friend asked me a question about OS,in our computer,we can see it supports near 4G ROM if it is a 32-bit windows,he asked about the ROM 4g is bit or Byte,i said is Byte of course,but now i can not find out why is byte
4 G = 2^32 Bytes
1 Bytes = 8 bit
4 G = 2^35 bit
so why 32-bit system supports near 4 G ROM ..
i am not good at OS ..
2^32 = 4294967296 bytes(B)
= 4194304 KB
= 4096 MB
= 4 GB
= 34359738368 bits(b)
And why ROM ? I think you mean RAM. ROM is like burned data on an external support (called as CD or DVD)
You can burn as much as data you want on a CD or DVD, depending on its size, but windows in 32 bits can only assign 4294967296 addresses. Windows is also using this memory space so you should have 20% (on 4Gb RAM) which is reserved for Windows to run.
Related
I am new to the concept of virtual memory.
I will like to know whats the maximum space of memory a procces can use through virtual memory?
Is it available RAM + available swap space ??
(This question has already been asked but people had different opinions on this issue)
For most systems the maximum size of virtual memory is determined by the number of bits in a virtual address that are supported by the MMU.
For example; for typical 64-bit 80x86 CPUs a virtual address is 64 bits, but only the lowest 48 bits are supported by the MMU, so the virtual address size is 1 << 48 = 256 TiB. Everything else (amount of RAM, swap space, etc) doesn't matter.
In theory, you can (e.g.) fill the entire virtual address space by mapping the same page of RAM everywhere; and (for 64-bit 80x86) it would only cost 4 KiB of RAM (for the data that's mapped everywhere) plus another 16 KiB of RAM (for MMU's own data - page tables, etc). In other words, a measly 20 KiB of physical RAM is enough to fill a whopping 256 TiB of virtual space.
Of course for practical purposes often the kernel reserves some of the virtual address space (e.g. half of it), so a process can only use the remainder (e.g. 128 TiB); and (for modern 64-bit CPUs) unless you're mapping the same data at different places in the virtual address space (which would be silly/pointless) it's likely that you'll run out of things to put in a virtual address space before you run out of virtual address space.
This isn't the case for older 32-bit CPUs, where the virtual address space is a lot smaller (where maybe a process can only use 2 GiB out of a 4 GiB total space) and it's a lot easier to run out of space.
Why the Operative System of 32 bits has the limitation of 4 GB of RAM?. I know the processor has a register, the PC(Program Counter), where the adress of an instruction is located and if this register is of 32 bits, its a hardware limitation because of size of the register. But why the Operative System of 32 bits has this limitation? Its harcoded in its kernel that the maximum ram avalaible can be 2 exponent 32 bits?
Thanks
Why the Operative System of 32 bits has the limitation of 4 GB of RAM?
It probably doesn't.
"32-bit" typically refers to the size of general purpose registers and may have nothing to do with the size of any address. For example, for modern 64-bit operating systems addresses are often only 48 bits.
Also; most operating systems use some form of paging where virtual address size may have nothing to do with physical address size. For example; for 32-bit 80x86 using PAE (Physical Address Extensions); virtual addresses are limited to 32-bit (causing each process to be limited to 4 GiB of "virtual space", minus whatever kernel reserves for itself); but physical addresses are/were 36 bits (giving a limit of "up to 64 GiB of RAM, minus space used for devices, ROMs, etc").
Even when physical address size is 32-bit, there are other hardware restrictions - e.g. some of those bits may be ignored by the hardware and/or used for other purposes (e.g. one bit used as an "encrypt the RAM or not" flag), and/or not supported by the RAM controller; and some of the physical address space must be used by things that are not RAM (ROM, devices, etc); so it's extremely unlikely that "32-bit physical addresses" will mean "max. of 4 GiB of RAM".
Finally; it is possible for hardware to support bank switching, where RAM is split into banks and some banks are mapped into the physical address space while others are not; and where "which bank/s are selected" is controlled by OS using special hardware. This was very common for 8-bit and 16-bit CPUs (e.g. "expanded memory" cards plugged into an ISA slot in PCs in the early 1980s); but has become significantly less common as physical address sizes have increased.
The limit is because in 32-bit architectures you are referencing the addresses in memory using 32-bit addresses. So this means that in 32-bit architecture you can only reference 2^32 addresses. Next we need to take into consideration that each address means that we are referencing a single byte which is 8 bits. This means that in effect we can reference 2^32 * 8 bits
Now lets get to the mathy part of the answer. If you can reference 2^32 * 8 bits then you can reference 2^35 bits and 2^35 = 34359738368 bits = 4294967296 bytes = 4194304 kilobytes = 4096 megabytes
And that is why you can only reference 4GiB of memory in 32-bit computers.
a) Suppose there is a RAM of size 4GB installed in an intel Core i5 computer. If the system supports 64bit word then how many words can be stored in the RAM? Also how many bits will be required to address each Word uniquely?
There are a lot of variables to this question. How big are the words? How much RAM does Microsoft let Word use before it starts swapping data in a pagefile? Is any compression used?
If we assume that Word has access to all 4GB of RAM (the OS, and Word aren't using any in this situation), that there is no pagefile to dump to, and no compression going on in the background, we can do some simple math to find out. We know that typically a single ascii character takes up 1 byte of memory, and that there are 1024 bytes in a KB, 1024 KB in a MB, and so on. So, we just multiply until we get to 4GB worth of bytes. 1024 Bytes X 1024 KB X 1024 MB X 4 GB = 4,294,967,296 ascii characters.
Coincidentally, that's the maximum number of possible 32-bit addresses in 32bit systems, and why 32bit systems were unable to support more than 4GB of RAM without Physical Address Extension (PAE). With so little RAM, it doesn't matter that the program is 64bit, it just means it can handle addressing and integers larger than that if the RAM is available.
I hope that helps you in some way! I'm kind of concerned that you are having to worry about the maximum number of words that can be stored in 4GB.
In a MIPS processor, I/O address space 0xffff0000 to 0xffffffff is reserved for memory-mapped I/O. Assuming that an I/O device needs 3, 1, and 4 32-bit words for control, status and data registers respecitvely. How many I/O devices can be supported?
The correct answer is 2048, but I got 8192.
My thought process:
Subtract the two spaces to retrieve the amount of memory needed
ffffffff - ffff0000 = 0000ffff = 65535 bits = 2^16 - 1
Then divide by 32-bits and multiply by 8, but that is obviously wrong.
Can someone guide me through the steps to get the correct answer? Thank you
Each devices uses: (3+1+4) * 32 bits = 8 * 4 bytes = 32 bytes
The available memory area is in bytes, not bits : 2^16 = 65536 bytes
Thus, you have: 65536 bytes / 32 bytes = 2048.
So 2048 devices are supported.
Essentially, how does 4Gb turn into 4GB? If the memory is addressing Bytes, should not the possibilities be 2(32/8)?
It depends on how you address the data.
If you use 32 bits to address each bit, you can address 232 bits or 4Gb = 512MB. If you address bytes like most current architectures it will give you 4GB.
But if you address much larger blocks you will need less bits to address 4GB. For example if you address each 512-byte block (29 bytes) you can address 4GB with 23 bits. FAT16 uses 16 bits to address (maximum) 64KB clusters and therefore can address a maximum 4GB volume. The same is used in Java Compressed Oops where you can address 32GB of memory with 32-bit reference.
Some older architectures even use word-addressable memory instead of byte like most do nowadays. Modern architectures that have a minimum addressable unit bigger than an octet are mainly found in DSPs. There also a few architectures with bit-addressable memory like Intel 8051
Most modern computers are byte-addressable, with each address identifying a single eight bit byte of storage; data too large to be stored in a single byte may reside in multiple bytes occupying a sequence of consecutive addresses.
There exist word-addressable computers, where minimal addressable storage unit is exactly the processor's word. For example, the Data General Nova minicomputer, and the Texas Instruments TMS9900 and National Semiconductor IMP-16 microcomputers used 16 bit words, and there were many 36-bit mainframe computers (e.g., PDP-10) which used 18-bit word addressing, not byte addressing, giving an address space of 218 36-bit words, approximately 1 megabyte of storage.
The efficiency of addressing of memory depends on the bit size of the bus used for addresses – the more bits used, the more addresses are available to the computer. For example, an 8-bit-byte-addressable machine with a 20-bit address bus (e.g. Intel 8086) can address 220 (1,048,576) memory locations, or one MiB of memory, while a 32-bit bus (e.g. Intel 80386) addresses 232 (4,294,967,296) locations, or a 4 GiB address space.
The electrical interface on the chip consists (extremely simplified) of a wires for the address (e.g. 32 address lines) and wires for the data (e.g. 8 wires for read data coming from the RAM, 8 wires for write data going to the RAM). In this case you have 232 words of 8 bits, so you can address 232*8 bits of data.
If you had a RAM with a word width of 16-bit instead (much more likely than 8-bit) you would be able to address twice as much RAM with the same number of address bits. On a modern system, you cannot really "read one byte" but instead the CPU fetches a whole cache line from the RAM and then gives you back just the byte that you asked for.
You can address 2 fields in memory with 1 bits.
You can address 4 fields in memory with 2 bits.
00, 01, 10, 11
So we can address memory by 2^n. For 32bit memory that each address holds 1byte can address 4GB data.
2^32 = 4.294.967.296 address can hold 4GByte data.