a) Suppose there is a RAM of size 4GB installed in an intel Core i5 computer. If the system supports 64bit word then how many words can be stored in the RAM? Also how many bits will be required to address each Word uniquely?
There are a lot of variables to this question. How big are the words? How much RAM does Microsoft let Word use before it starts swapping data in a pagefile? Is any compression used?
If we assume that Word has access to all 4GB of RAM (the OS, and Word aren't using any in this situation), that there is no pagefile to dump to, and no compression going on in the background, we can do some simple math to find out. We know that typically a single ascii character takes up 1 byte of memory, and that there are 1024 bytes in a KB, 1024 KB in a MB, and so on. So, we just multiply until we get to 4GB worth of bytes. 1024 Bytes X 1024 KB X 1024 MB X 4 GB = 4,294,967,296 ascii characters.
Coincidentally, that's the maximum number of possible 32-bit addresses in 32bit systems, and why 32bit systems were unable to support more than 4GB of RAM without Physical Address Extension (PAE). With so little RAM, it doesn't matter that the program is 64bit, it just means it can handle addressing and integers larger than that if the RAM is available.
I hope that helps you in some way! I'm kind of concerned that you are having to worry about the maximum number of words that can be stored in 4GB.
Related
A 32-bit register can store 232 different values. The signed range of integer values that can be stored in 32 bits is -2,147,483,648 through 2,147,483,647 (unsigned: 0 through 4,294,967,295). Hence, a processor with 32-bit memory addresses can directly access 4 GiB of byte-addressable memory. so how this kind of processor deal with disk of size more than 4 gb?
Hence, a processor with 32-bit memory addresses can directly access 4 GiB of byte-addressable memory. so how this kind of processor deal with disk of size more than 4 gb?
For disks; typically they're not byte addressable and the smallest amount that can be read or written (the block size) is 512 bytes or larger (maybe 4096 bytes). Block numbers may also be larger than 32 bits (e.g. maybe 48 bit block numbers).
With 512-byte blocks and 48 bit block numbers (which was common in the late 1990s; for ATA and SATA, etc) you'd end up with a maximum disk size of 134217728 GiB.
Of course the CPU probably (see note) can't directly access any of the data on disk. Software (file system) has to ask a device driver to fetch the block/s it wants, and device driver asks hardware (disk controller) to copy data between disk and memory. Depending on OS; this software interface (used by file system to ask device driver to read or write blocks) most likely uses 64-bit block numbers (e.g. two 32-bit registers joined together).
Note: More recently, the possibility of using non-volatile RAM (e.g. https://en.wikipedia.org/wiki/3D_XPoint ) as storage changed things (it is byte addressable and does use physical addresses); but modern hardware is all "64-bit" (with physical addresses that may be 48 bits or larger in practice) so even though the theoretical limit is much smaller it's still large enough in practice (e.g. maybe 200000 GiB).
On x86-64, the main CPU architecture of most desktop computers, an interface is standardized in the AHCI (Advanced Host Controller Interface). The computer accesses the hard-disk using this interface which is, in practice, a PCI-Express device compliant with the PCI-Express specification.
With PCI, the CPU has a memory controller which will write to the PCI devices registers instead of RAM when writing to some portions of RAM. Software (the operating-system) will write in uncached RAM and it will instead write to the registers of the PCI device. This way it can tell the devices, including an AHCI, to do some operations like a DMA operation from the hard-disk to RAM and vice-versa.
I didn't read the specification in full but the specification probably holds 64 bits registers that can be written as 2 32 bits words. More often, software will write to the lower part of the register then to the higher part of the register. This allows any 32 bits computers to still be able to interact with AHCI. On a 64 bits computer, the registers will be written as one 64 bits write.
A 32 bits computer is thus still able to trigger DMA writes to some portions of the hard-disk which are much higher than 4GB.
Why the Operative System of 32 bits has the limitation of 4 GB of RAM?. I know the processor has a register, the PC(Program Counter), where the adress of an instruction is located and if this register is of 32 bits, its a hardware limitation because of size of the register. But why the Operative System of 32 bits has this limitation? Its harcoded in its kernel that the maximum ram avalaible can be 2 exponent 32 bits?
Thanks
Why the Operative System of 32 bits has the limitation of 4 GB of RAM?
It probably doesn't.
"32-bit" typically refers to the size of general purpose registers and may have nothing to do with the size of any address. For example, for modern 64-bit operating systems addresses are often only 48 bits.
Also; most operating systems use some form of paging where virtual address size may have nothing to do with physical address size. For example; for 32-bit 80x86 using PAE (Physical Address Extensions); virtual addresses are limited to 32-bit (causing each process to be limited to 4 GiB of "virtual space", minus whatever kernel reserves for itself); but physical addresses are/were 36 bits (giving a limit of "up to 64 GiB of RAM, minus space used for devices, ROMs, etc").
Even when physical address size is 32-bit, there are other hardware restrictions - e.g. some of those bits may be ignored by the hardware and/or used for other purposes (e.g. one bit used as an "encrypt the RAM or not" flag), and/or not supported by the RAM controller; and some of the physical address space must be used by things that are not RAM (ROM, devices, etc); so it's extremely unlikely that "32-bit physical addresses" will mean "max. of 4 GiB of RAM".
Finally; it is possible for hardware to support bank switching, where RAM is split into banks and some banks are mapped into the physical address space while others are not; and where "which bank/s are selected" is controlled by OS using special hardware. This was very common for 8-bit and 16-bit CPUs (e.g. "expanded memory" cards plugged into an ISA slot in PCs in the early 1980s); but has become significantly less common as physical address sizes have increased.
The limit is because in 32-bit architectures you are referencing the addresses in memory using 32-bit addresses. So this means that in 32-bit architecture you can only reference 2^32 addresses. Next we need to take into consideration that each address means that we are referencing a single byte which is 8 bits. This means that in effect we can reference 2^32 * 8 bits
Now lets get to the mathy part of the answer. If you can reference 2^32 * 8 bits then you can reference 2^35 bits and 2^35 = 34359738368 bits = 4294967296 bytes = 4194304 kilobytes = 4096 megabytes
And that is why you can only reference 4GiB of memory in 32-bit computers.
For a 2GBytes memory, suppose its memory width is 8 bits….
what is the address space of the memory?
what is the address width of the memory?
I’m not looking for the answer to question, I’m just trying to understand the process of how to get there.
EDIT: all instances of Gb replaced with GB
The address-space is the same as the memory size. This was not true (for example) in 32 bit operating systems that had more than 2^32 bytes of memory installed. Since the number of bits used for addressing is not specified in your question, one can only assume it to be sufficient to address the installed memory. To contrast, while you could install more than 4GB in a 32 bit system, you couldn't access more than 4GB, since (2^32)-1 is the location of the last byte you could access. Bear in mind, this address-space must include video memory and any/all bioses in the system. This meant that in 32bit WinXP MS limited the amount of user-accessible memory to a figure considerably less than 4GB.
Since the memory width is 8 bits, each address will point to 1 byte. Since you've got 2GB, you need to use a number of bits for addressing that is equal-to or greater-than that which will allow you to point to any one of those bytes.
Spoiler:
Your address-space is 2GB and you need 31 bit wide addresses to use it all.
Is there any difference between 8k block on 32bit file system vs 4k block on 64bit file system?
If there is, how big would the difference in the largest file size be? Would I calculate it the same way I would calculate 8k on 32bit and just change 4bytes on 32bit to 8bytes on 64bit?
Ex. 8k bytes w/ 32bit disk addresses
So 8192/4bytes = 2048*8KB = 16MB of file data (singly indirect)
and 2048*2048*8k = 32GB of file data (doubly indirect)
Ex. 4k bytes w/ 64bit disk addresses
4096/8 = 512*4k = 2MB of data (singly indirect)
and 512*512*4k = 10GB of file data (doubly indirect)
So if the example is true, there would be a big difference between the two (specially in triply indirect, which gives the max file size)?
If you have real-world filesystems in mind, you can check the maximum
file size on Wikipedia.
In particular, if it's ext4, the block size vs. number of bits
doesn't change the max size of an individual file.
If you're talking about a theoretical system, your calculations are
fine. Do keep in mind that inode-based filesystems typically
have direct blocks as well, ext4 defines 12 of them. So add 48k to
your 4k-block example, 96k to the 8k-block one. And don't forget to add the triply-indirect blocks!
Essentially, how does 4Gb turn into 4GB? If the memory is addressing Bytes, should not the possibilities be 2(32/8)?
It depends on how you address the data.
If you use 32 bits to address each bit, you can address 232 bits or 4Gb = 512MB. If you address bytes like most current architectures it will give you 4GB.
But if you address much larger blocks you will need less bits to address 4GB. For example if you address each 512-byte block (29 bytes) you can address 4GB with 23 bits. FAT16 uses 16 bits to address (maximum) 64KB clusters and therefore can address a maximum 4GB volume. The same is used in Java Compressed Oops where you can address 32GB of memory with 32-bit reference.
Some older architectures even use word-addressable memory instead of byte like most do nowadays. Modern architectures that have a minimum addressable unit bigger than an octet are mainly found in DSPs. There also a few architectures with bit-addressable memory like Intel 8051
Most modern computers are byte-addressable, with each address identifying a single eight bit byte of storage; data too large to be stored in a single byte may reside in multiple bytes occupying a sequence of consecutive addresses.
There exist word-addressable computers, where minimal addressable storage unit is exactly the processor's word. For example, the Data General Nova minicomputer, and the Texas Instruments TMS9900 and National Semiconductor IMP-16 microcomputers used 16 bit words, and there were many 36-bit mainframe computers (e.g., PDP-10) which used 18-bit word addressing, not byte addressing, giving an address space of 218 36-bit words, approximately 1 megabyte of storage.
The efficiency of addressing of memory depends on the bit size of the bus used for addresses – the more bits used, the more addresses are available to the computer. For example, an 8-bit-byte-addressable machine with a 20-bit address bus (e.g. Intel 8086) can address 220 (1,048,576) memory locations, or one MiB of memory, while a 32-bit bus (e.g. Intel 80386) addresses 232 (4,294,967,296) locations, or a 4 GiB address space.
The electrical interface on the chip consists (extremely simplified) of a wires for the address (e.g. 32 address lines) and wires for the data (e.g. 8 wires for read data coming from the RAM, 8 wires for write data going to the RAM). In this case you have 232 words of 8 bits, so you can address 232*8 bits of data.
If you had a RAM with a word width of 16-bit instead (much more likely than 8-bit) you would be able to address twice as much RAM with the same number of address bits. On a modern system, you cannot really "read one byte" but instead the CPU fetches a whole cache line from the RAM and then gives you back just the byte that you asked for.
You can address 2 fields in memory with 1 bits.
You can address 4 fields in memory with 2 bits.
00, 01, 10, 11
So we can address memory by 2^n. For 32bit memory that each address holds 1byte can address 4GB data.
2^32 = 4.294.967.296 address can hold 4GByte data.