SystemVerilog Coverage: Create a bin for each element of an enum - system-verilog

Question

Say I have a enum which contains a list of valid commands or opcodes.
Is there a way to create a bin for each element of the enum?
class command_coverage;
enum {SEQ_WRITE_16_BIT = 32'hBEEFFOOD, SEQ_READ_16_BIT = 32'hFACEFACE,
... } my_valid_commands
covergroup cg();
command_cp : coverpoint cmd {
bins valid_commands[] = each element of enum;
}
endgroup
...
endclass
I tried something like:
bins valid_commands[] = my_valid_commands;
or
bins valid_commands[] = {[0:$] inside my_valid_commands};
But it didn't work as I wanted.

Answer 1

It can be done:
command_cp : coverpoint my_valid_commands {
bins valid_commands[] = {[my_valid_commands.first:my_valid_commands.last]};
first and last are methods of the enum, which return the first and last values respectively. These are then used as part of a range.
Here's the display from Mentor Questa (other simulators are available - I have Questa installed on my PC):
Here's an MCVE:
https://www.edaplayground.com/x/5rUu
module enum_cg;
enum {SEQ_WRITE_16_BIT, SEQ_READ_16_BIT} my_valid_commands;
covergroup cg();
command_cp : coverpoint my_valid_commands {
bins valid_commands[] = {[my_valid_commands.first:my_valid_commands.last]};
}
endgroup
cg cg0 = new;
initial begin
my_valid_commands = SEQ_WRITE_16_BIT;
cg0.sample;
end
endmodule