could anyone please explain how does memory layout works on STM32, for example I am using STM32F205RCT6 which say it has 256Kbyte of FLASH.
If I understand it correctly it means I cannot use memory past Sector 5., because I would violate 256Kb size, is that correct?
Datasheet image below (link to datasheet)
You can access as much memory as you have.
If you have 256Kbyte flash you can access at 0x8000000 - 0x803FFFF
When you erase the sector you can only access Sector 0, Sector 1,Sector 2,Sector 3,Sector 4, Sector 5 as sum of sizes of those sectors is 256kbyte (rather simple math)
16 + 16 + 16 + 16 + 64 + 128 = 256
S0 + S1 + S2 + S3 + S5 + S5
You must understand that the datasheet is used for a large variety of models. The model that you are using have only 256KB, but other models have up to 1MB, that's why the datasheet shows so many sectors.
Related
The image is relating to an example of translating in virtual memory. The address of phys. mem. starts from 0x000 ~ 0x0FC, then moves start 0x100 ~ 0x1FC and so on. Why don't it go like 0x000 ~ 0x0FF, and then 0x100 ~ 0x1FF etc. What are the two lowest bits stand for?
Thank you for your answers. This photo came from MIT open course, and they didn't reveal more details about the address. But I finally figured it out in the later example of the courses.
The two lowest bits can always be zero as the following example:
Supports that we have:
4GB of MM size.
64 lines of cache.
ONLY 1 WORD = 4 bytes PER CACHE LINE.
The address have 32 bits because of 4GB of MM.
The partial address defining the line have 6 bits because of 64 lines of cache.
And because the cache size is 2^6*4B
=> The tag have 24 bits (log2(4GB/2^8B))
=> The lowest bits have 2(32 - 24 - 6) bits.
Because there is only a word per block so that the lowest bits, which act as a data boundary(This is what the course said), are always 0.
How can I find DRAM row buffer size programmatically or by using already existing tools in say a *nix system ?
As an example, with a Kingston DDR4, I executed the following commands (you might need to install some packages) :
sudo modprobe eeprom
decode-dimms
These commands, among many information, give me the characteristics of my DDR stick:
---=== Memory Characteristics ===---
Maximum module speed 2132 MHz (PC4-17000)
Size 16384 MB
Banks x Rows x Columns x Bits 16 x 16 x 10 x 64
SDRAM Device Width 8 bits
Ranks 2
Rank Mix Symmetrical
AA-RCD-RP-RAS (cycles) 14-14-14-35
Supported CAS Latencies 16T, 15T, 14T, 13T, 12T, 11T, 9T
Rows and columns are actually number of address bits (you can check the decode-dimms source at https://fossies.org/linux/i2c-tools/eeprom/decode-dimms, and understand what the code is doing when you look at the DDR4 SPD information: https://en.wikipedia.org/wiki/Serial_presence_detect#DDR4_SDRAM)
Thus, if we have 10 column bits, we have 1024 columns (2^10), where each column is composed of the module width (64 as per the data above, represented as "bits"). Since we can also see that the SDRAM device width is 8x, we can deduce that the DIMM locksteps 8 SDRAM chips (those black boxes you see in your DRAM stick) to get that total width of 64 bits.
The row buffer size in my DDR4 is, therefore, 64 bits * 1024 columns = 65536 bits wide (8192 Bytes). Row buffer sizes in DDR3 and DDR4 are mostly this length, but new architectures such as HMC and HBM have different sizes.
So, in one short commandline, to return in bits (just divide by 8 to get bytes):
decode-dimms | grep "Columns x Bits" | awk -F 'x' '{print (2^$(NF-1))*$NF}
PS: mind you, this handles a single DIMM. if you have multiple DIMMS decode-dimms might return information for multiple modules.
As the title suggests, I am having a problem trying to figure out how to combine 2x 16 bit into 1x 32 bit, can anyone point me in the right direction? Cheers in advance
From a mathematical standpoint you can do
32 bit word = (high word * 65536) + low word
I am doing motion detection on a fairly small video. 56 frames of 288x384xRGB. I keep two copies of it, so it should amount to about 40 Mb tops, including my other variables.
Now, this line gives me an out of memory error
output = uint8(zeros(this.videoHeight,2.*this.videoWidth,3,size(this.originalFrames,4)));
typing memory reports
>> memory
Maximum possible array: 202 MB (2.114e+08 bytes) *
Memory available for all arrays: 863 MB (9.045e+08 bytes) **
Memory used by MATLAB: 527 MB (5.526e+08 bytes)
Physical Memory (RAM): 3071 MB (3.220e+09 bytes)
* Limited by contiguous virtual address space available.
** Limited by virtual address space available.
>>
I'm new to MATLAB, but not totally new to programming. What am i not understanding?
EDIT
So i did som disp'ing:
disp(this.videoHeight)
disp(2.*this.videoWidth)
disp(size(this.originalFrames,4))
produces:
288
768
54
So, it is actually smaller than i suggested...
You should use
zeros(..., 'uint8')
rather than
uint8(zeros(...))
to avoid creating the array in double-precision first, and then copying it to a uint8 array.
I haven't looked in detail but I would be surprised if there weren't quite a bit of overhead imposed by Matlab. You're probably using a lot more memory than you might suspect.
Try dialing down the number of frames you process to see if that fixes the problem.
I'm looking over some exam papers for Operating Systems and I have come across a question which I simply cannot figure out. The memory management scheme is paging
Here is the question:
An operating system that runs on a CPU with a 16 bit address pointer employs a paging memory management scheme with a page size of 1024 bytes.
a) At most how many frames can physical memory contain?
b) Indicate which bits in an address pointer are used for page and offset.
c) A process image of size 3.5K resides in memory. You are given the page table of this process in Figure 1 below. What physical address will the hexadecimal logical address 0x0FCE result in? Show your calculations.
d) How much internal fragmentation does this process produce?
Page Frame
0 4
1 8
2 9
3 6
Figure 1 Process Page Table
Can anybody help me with this ?
A 16bit address bus allows to access 2^16 = 64kB of physical memory. Since on this system you have pages of size 1024B = 2^10, your memory falls into 2^16 / 2^10 = 2^6 physical frames.
Given the previous result, with pages of 1024 = 2^10 bytes, you need 10 bits for accessing any bytes of the page. Thus, the 6 high-order bits ares used for getting the page index from the page table (basically the figure 1 in your homework), and the 10 low-order bits are used for offsetting in that page.
The logical address 0xfce resides in the fourth page because the six high-order bits are 000011b = 3 = 4th page = 0x0c00-0x0fff. Given the page table and assuming the physical memory is sequential, the fourth page maps to the sixth physical frame which start at 1024 * 6 = 0x1800 = 0001100000000000b. The six high-order bits of the page are 000110b, where we add the 10 bits of offset resulting from the previous answer: 000110b << 10 | 0x3ce = 0x1bce.
Since the frame allocation is not sequential (4, 6, 8, 9), the hole between pages 4 and 6 (i.e. 1024B), and the hole between page 6 and 8(i.e. again 1024B), result in physical memory fragmentation.
Hope this help.