I was asked the above question the viva of operating systems and my answer that logical address is less than physical address because :
Logical Address
-is the address visible to the application program
-starts from 0 and is contiguous throughout the size of the application program
-has Max size equal to length of the application program
Physical address
- is obtained by adding base register contents to logical address, which gives the virtual address, and then using the page table to obtain the true physical address
- has Max length equal to length of physical memory
I was told that the answer is incorrect since the size of virtual address space is greater than that of physical address space.
The logical address size can be less than, equal to, or greater than physical address size. Real life examples:
Less than - A 32 bit application running on a 2014 Mac Book Pro with 16 Gb of memory. Logical addresses are 2^32 in size, physical addresses are 2^34 in size.
Equal: A 32 bit application running on a 2012 Mac Book Pro with 4Gb of memory. Both are 2^32 in size.
Greater than: An application on a 32 bit Windows system with 512 Mb of memory. Logical address size is 2^32, physical address size is 2^29.
Size of logical address can be greater than that of physical address if the size of application program is greater than that of physical memory -
Max size of logical address equals size of application program which may be as big as the size virtual memory (which is greater than size of physical memory)
As far as the question asked in the viva is concerned it has no definite answer since in general size of logical address may be greater or less than that of physical address.
Related
Consider a logical address space of 64-pages of 2048 words each, mapped onto a physical memory of 32 frames.
how do i find how many bits are there in the logical address and physical address?
please explain.
A system has 512MB physical memory and 4GB virtual memory with a page size of
8KB. (Sznarks)
Find the number of bits for the physical address and the virtual address.
Find the number of pages and the number of frames.
Find the number of bits for the physical address and the virtual address.
The physical address space needs to be large enough for more than just RAM (you need space for ROM and memory mapped devices; and often there's "unused" space for future expansion). There isn't enough information to say anything other than "physical addresses probably have more than 29 bits", but in that case it's likely that the hardware designer would round it up to a nice "power of 2", so 32 bits is the most likely for number of bits in a physical address.
Virtual addresses would have 32 bits (because "log2(4 GiB) == 32").
Find the number of pages and the number of frames.
"512 MiB / 8 KiB" works out to 65536 physical pages of RAM alone (excluding ROM, memory mapped devices, etc).
"4 GiB / 8 KiB" works out to a maximum of 524288 virtual pages per virtual address space.
Currently I am going through Operating system principles by Galvin book. I am enjoying reading it but in the mean time I have a question.
Can I say that if I use a 64 bit operating system then the logical address space (that a CPU generates) can be of 64 bits? I.e. it will be able to map a large number of frames in the physical memory. If I use a 32 bit OS then the CPU can generate maximum of 2^32 logical address space.
Is that correct?
Sort of, but there are many technicalities which make these names less useful.
First, there are two different sizes that matter to an operating system: Address size and data size. The address size determines how big of an address space is available, and the data size determines how much data can be used in a single-word operation. In my experience, operating systems are usually identified by data size, which means the address size could be something else.
Below are some example architectures and their address and data sizes. As the table shows, the most common 32 bit and 64 bit architectures today have the same data and address sizes, which is why your statement is partially correct. Note that x86 processors in 16-bit mode have a larger address size than data size. This is caused by additional segment registers being used in addressing, which makes the architecture less restrictive.
Address size Data size
x86 16-bit 20 bits 16 bits
x86 32-bit 32 bits 32 bits
x86 64-bit 64 bits 64 bits
ARM 32-bit 32 bits 32 bits
ARM 64-bit 64 bits 64 bits
However, the address size does not necessarily indicate how big of a logical address space can be used. There could be a limitation which restricts the space to a smaller area. For example, no current x86-64 processor supports a 64 bit address space. Instead, they require that the high 16 bits of any address be a sign extension of bit 47, allowing a 248 address space, 256 TiB instead of 16 EiB. This reduces the number of address lines which need to be used in the processor while allowing far more than anyone currently uses.
Finally, everything so far has been in reference to the logical or virtual address space. The physical address space could have a different size. Newer 32 bit x86 systems have Physical Address Extension, which enables 36 bit physical addresses, and x86-64 systems are limited to no more than a 52 bit physical address space, but this can be further limited by the memory controller/motherboard. When the logical address space is bigger than the physical address space, it allows the entire physical address space to be mapped to multiple places at once. When the logical address space is smaller, it allows multiple complete address spaces to be stored in physical memory at the same time.
While I was reading this Wikipedia article, http://en.wikipedia.org/wiki/Memory_management_unit#How_it_works, I came across that divide virtual address space (range of address used by processor) into pages. But I have learnt that only the physical memory (RAM) is divided into pages. So how is the division of virtual address space of a process done?
Also, here the definition of virtual address space goes as range of address used by processor. Range of address used by processor means the length of address bus in processor, right? So if I am having a processor of address bus of 32 bits, and a RAM of 4 GB (2^32), is my physical and virtual address space same?
Bear with me if the questions are too naive.. I am still not getting a very clear visualization of address space. Thanks in advance.
The answer is specific to each OS, but in general terms it means that though each process gets say 32 bits worth of addressable memory, this memory space is divided in to ranges or pages of a certain size.
Simplistically speaking when your process accesses an address, that location will be in a certain page. The OS will ensure that there is physical memory that is mapped to that location. However it may not be in the same address in physical ram.
When some other process addresses that location then the OS will map in a page of physical ram at that so that location too will be addressable.
All the time the physical memory pages are being mapped to and from disk (so that you can have memory greater than 32 bits worth_\, and the virtual memory pages are being mapped to physical pages just described.
I really recommend reading the links in this question https://stackoverflow.com/questions/1437914/best-book-on-operating-systems
I am confused about the definition of word size. I read that the word size of a processor is its data bus width. Like an 8 bit processor has an 8 bit wide data bus. I recently read that the maximum size of the virtual address space is determined by word size i.e. if the word size is n bits the max virtual address space is 2^n -1. But I always thought that maximum virtual address space is determined by address bus width i.e. an n bits wide address bus can address maximum 2^n bytes. So, what is true?
Also, is this related to pointers as an n bit data bus is capable of carrying only an n bit address. So, maximum 2^n bytes can be accessed via pointers.
I'll first say that some of your confusion probably comes from the fact that things were simpler a few decades ago and your understanding of terms is based on these simpler machines.
I am confused about the definition of word size.I read that the word size of a processor is its data bus width. Like an 8 bit processor has an 8 bit wide data bus.
Definitely not. Data bus with is completely unrelated to this. The word size (which has never really been a precise term) of a processor is best loosely defined as the largest natural size for arithmetic which is generally the size of the registers in the machine. This is quite frequently the width of the data path (which is distinctly different from the data bus). The data path is simply the width of the ALUs. The word size is often the same as the pointer size.
I recently read that the maximum size of the virtual address space is determined by word size i.e. if the word size is n bits the max virtual address space is 2^n -1. But i always thought that maximum virtual address space is determined by address bus width i.e. an n bits wide address bus can address maximum 2^n bytes. So, what is true?
No. The size of the virtual address space is simply determined by the number of bits in the virtual page number of the page table (and the TLB). On current amd64 based machines, only 48 bits of the virtual address are useable. The upper 16 are a sign extension of bit 47. On current amd64 machines, the physical address size is 52 bits. These physical address bits are the ones that are sent on the bus. Though even the term bus is really incorrect. Almost all links are point-to-point (DDRx DRAM is an exception) and use a packetized format (header + payload) instead of address wires and data wires.
Also, is this related to pointers as an n bit data bus is capable of carrying only an n bit address. So, maximum 2^n bytes can be accessed via pointers.
Many (almost all even) machines that have a separate address bus, use an address bus that is narrower than the the number of address bits. These bits are simply split up and sent across the bus using multiple clock cycles. DDRx DRAM is another example of this.
the maximum size of the virtual address space is determined by word size
This used to be true, but certain extensions were made to bypass this limitation (namely Physical Address Extension, or PAE) which enables such things as 36 bit memory addresses.
Aside from that, wikipedia defines a word as:
the natural unit of data used by a particular processor design
In almost all cases, this is 32 bits on 32 bit systems and 64 bits on 64 bit systems. You will still frequently find references to 32 bit words on 64 bit systems (partially because amd64 is an extension of intel x86 rather than a revision). Also, as a holdover from the earlier days of modern computing, you will frequently see 32 bit quantities referred to as a DWORD or double word, and 64 bit ones as a QWORD or quad word.
This is something people fight about all the time. I personally use the definition of word size == bus width.