Assume a virtual memory configuration with a page frame of size 2K, virtual address of space of size 32K and physical address space of 16K. With a page mapping of your choice, determine the actual physical address corresponding to the virtual address 0573H.
I am new on this topic. please, anyone can explain the easy way to mapping from logical address to physical address?
Page size =2K=2^11
Virtual Address Space = 32K=2^15
Physical Address Space =16K=2^14
Here Virtual Address is :
0573H ==> 0000 0101 0111 0011
Page# = 0000 ==>0
Page offset = 101 0111 0011 ==> 573
By consulting page table we can get the frame number to which this page has been assigned to, and compute actual physical address as shown in this fig.
Related
Suppose the following properties are given:
32-bit virtual address
16-kbyte virtual page size
32-bit Page Table Entry
8-Gbyte physical memory
(that 1Gb = 230 bytes and 1 kb = 210 bytes)
Does this mean that the page table must have 2^20=1048576? And how can I calculate its physical frame and virtual page?
The physical page size must match the virtual page size (16 KiB).
With 8 GiB of physical memory divided into 16 KiB pages; you'd end up with 524288 pages of physical RAM. However, the physical address space is also used things that aren't RAM (ROM, memory mapped devices, etc), and often some physical memory is "stolen" for other purposes (e.g. integrated graphics) and made inaccessible via. any normal physical addresses. With this in mind the correct answer is "the number of physical frames is unknowable, there isn't enough information".
If virtual addresses are 32-bit, then the virtual address space size is 4 GiB. With 4 GiB of virtual address space divided into 16 KiB pages you'd end up with 262144 virtual pages per virtual address space. However; there are an unknowable number of virtual address spaces (and an unknowable amount of each virtual address space will probably be used as "kernel space that is the same in all virtual address spaces"); so the correct answer is "the total number of virtual pages (for all virtual address spaces) is unknowable, there isn't enough information".
A system has 512MB physical memory and 4GB virtual memory with a page size of
8KB. (Sznarks)
Find the number of bits for the physical address and the virtual address.
Find the number of pages and the number of frames.
Find the number of bits for the physical address and the virtual address.
The physical address space needs to be large enough for more than just RAM (you need space for ROM and memory mapped devices; and often there's "unused" space for future expansion). There isn't enough information to say anything other than "physical addresses probably have more than 29 bits", but in that case it's likely that the hardware designer would round it up to a nice "power of 2", so 32 bits is the most likely for number of bits in a physical address.
Virtual addresses would have 32 bits (because "log2(4 GiB) == 32").
Find the number of pages and the number of frames.
"512 MiB / 8 KiB" works out to 65536 physical pages of RAM alone (excluding ROM, memory mapped devices, etc).
"4 GiB / 8 KiB" works out to a maximum of 524288 virtual pages per virtual address space.
Can someone help me understand this question:
A processor providing 64GB of addressable main memory such as the AMD FX8350
Which of the following is the correct maximun range of main memory locations for such a processor?
A.0x000 to 0x3FF
B.0x0 0000 TO 0x3F FFFF
C.0x000 0000 TO 0x3FF FFFF
D.0x0 0000 0000 TO 0x3F FFFF FFFF
E.0x0 000 000 000 TO 0x3F FFFF FFFF FFFF
I am afraid there is no simple answer to this question. The microprocessor will have different addressing modes and will map real memory into the virtual address space in pages, usually of 4k in size. So the virtual address space may not even be contiguous.
First of all there is no such thing as "Processor providing xx memory". A processor can specify how many bits of addresses it is able to operate on. Most common cases are 32 and 64 bit. Processors with 32 bit addressing, are able to access 2^32 locations = 4GB. Processors with 64 bit addressing, theoretically, is able to address 2^64 locations. However most of them, only support 48 bits of addressing providing 256 TB of addressable space.
Now in order to make use this capabilities, you need the support of the operating system as well, i. if you have a 64 bit processor and a 32 bit OS, you can only access 32 bit addresses.
I have trouble doing this small exercise:
So far I got this:
For VADDR = 0x5ddb, binary representation is 0101 1101 1101 1011, thus we know the VPN = 101 = 5.
What's the next step?
The most significant three bits constitute the virtual page number, the remaining twelve bits form the offset into the page frame.
In your concrete example the virtual page number is 5, as you correctly mentioned, and the offset is
1101 1101 1011 = 0xddb = 3547
Now proceed like this:
Use the virtual page number as an index into the page table. The 5th (starting from zero) is 0x80000006.
Check the validity bit. It's set, so the page entry is valid. If it was not the page would not be in memory and a page fault would occur.
As said in the image, the rest of the entry is the page frame number. It's the 6th page frame, so you can calculate the page frame's phyiscal address by multiplying this number with the size of a page frame, that is, 4 KiB. Hence, the physical address is
6 * 4 KiB = 24 KiB = 24576
Add the offset to the physical address of the page frame:
24576 + 3547 = 28123
And you have your address.
The virtual address 0x5ddb corresponds to the physical address 28123 = 0x6ddb on the described system.
I learnt that the physical address is calculated by shifting the segment address (16-bit) left 4 times and adding it with the 16-bit offset address. The memory in the 8086 architecture is 1M.
My question is if the segment register and the offset value both are FFFFH and FFFFH then the result would be more than FFFFH i.e., more than 1M.
FFFF0
+ FFFF
----------
10FFEF
haw is it actually calculated...??
It does modular arithmetic, dropping any carries. So for a segment of FFFF and offset of FFFF, you compute FFFF0 + FFFF = 10FFEF but it "drops" the initial 1, leaving a real answer of 0FFEF.
The 8086 address bus is only 20 bits wide, which gives a max high address of 0xFFFFF = 1,048,575. It's calculated just the way you did it, but only the low-order 20 bits are used in the memory fetch.