How can we put an integer variable into a task string? - system-verilog

Question

Indeed I have a task to read registers:
task read_reg(bit[31:0] reg_addr,bit [0:31] rd_beat...);
The first input parameters is the address of the register that is 32-bit, as you can see. The register addresses are defined through parameters:
parameter int REG_0 = 32'h80440050; //R
So when you call the task to read a register, you can pass over the parameter to the task:
read_reg(REG_0,….);
to read e.g. REG_0.
Now, this is the call of the task that I would like to parametrize more, so I don't want to hardcode the parameter name REG_0 into it but I would like to handle it partly through another variable:
bit [1:0] num=0;
and then instead of hardcoding REG_0 when calling the task, I would like to use the variable "num" for it, so something like:
read_reg(REG_$num$,...)
just I don't know how to handle over the value of num (which is 0 in the above example) into the call of the task.
I hope I managed to give a clearer description now and that someone has an idea how to do it.

Answer 1

There's no way to form an identifier name from a variable. You want an array. You can do
parameter int REG[4] = {32'h80440050, //R
32'h80450050,
...};
read_reg(REG[num],...)
or you could create an associative array
int REG[string] = '{"REG_0":REG_0,"REG_1":REG_1,...};
read_reg(REG[$sformatf("REG_%0d",num)],...);