I have connected and tested the two break-board versions of MPR121 Proximity Capacitive Touch Sensor Controller with various mcu's (ESP32, RPI pico, ARDUINO)
The one on a keypad version (Sparkfun compatible) and the one that you can connect custom pads to it. I tried them both with cpp and micropython. I connected them via I2C and everything is functioning on all occasions, with the IRQ option as well.
However I have trouble increasing sensitivity and by that I mean that if I place even a thin piece of paper or other layer before the touch pads, I can't get a touch signal.
Looking into the MPR121 micropython example Library I modified the following:
MicroPython MPR121 capacitive touch keypad and breakout board driver
https://github.com/mcauser/micropython-mpr121
Inside this library I see the following parameters for tuning that I tried:
# Set touch and release trip thresholds
#self.set_thresholds(15, 7) default....
self.set_thresholds(15, 7)
# Set config registers
# Debounce Touch, DT=0 (increase up to 7 to reduce noise)
# Debounce Release, DR=0 (increase up to 7 to reduce noise) .....default was 0x00
self._register8(MPR121_DEBOUNCE, 0x00)
# First Filter Iterations, FFI=0 (6x samples taken)
# Charge Discharge Current, CDC=16 (16uA) .default was 0x10 5-30 less to more sensitive
self._register8(MPR121_CONFIG1, 0x30)
# Charge Discharge Time, CDT=1 (0.5us charge time)
# Second Filter Iterations, SFI=0 (4x samples taken)
# Electrode Sample Interval, ESI=0 (1ms period) .default was 0x20 5-30 less to more sen
self._register8(MPR121_CONFIG2, 0x20)
I tried various combinations but the effect is minimal if non-existent. My target or best case scenario is to be able to place a 3mm plexiglass on top of the breakout board or custom pads.
Related
I have been studying about SPI and would like to clarify few more things:
1.
I am trying to understand about CPOL and CPHA in particular:
I have a device (MCP41 that I want to write SPI drivers for). The datasheet can be found here:
https://ww1.microchip.com/downloads/en/devicedoc/11195c.pdf
According to the timing diagram:
It mentions that Data is always latched in on the rising edge of the SCK. Is that supposed to give me any hints about CPHA?
It also mentions that the Data is always clocked out of the SO pin after the falling edge of SCK. Since it mentions falling edge of the SCK, I understand that the CPHA for this device should be set to 1, is that correct?
2 What if I have 2 SPI devices connected to the same SPI bus. One device requires CPOL = 0, CPHA = 0 and the other device requires CPOL = 0 and CPHA = 1. Does that mean it will not be possible to communicate with both devices via single SPI bus?
The timing diagram shows that this device requires SPI mode 0: CPOL=0 CPHA=0.
The way to read the diagram is that the clock idles low, so CPOL=0. The data is sampled (called "latched" above) on the rising edge. This is the first edge when starting low so CPHA=0 (the rising edge would be the second edge if starting high).
The comment about output data on the falling edge simply means that the device outputs the next data starting on the second edge of the preceding pulse, this way it is ready in time for the first edge of the next clock pulse.
For your second question, yes you can mix different clock modes (polarity, phase and speed) on the same bus, as long as you make all the changes when no device is selected, ie: when all chip-selects are high. You may want to even change the mode of the chip select pins momentarily to GPIO while you deconfigure and reconfigure the SPI peripheral (I'm never sure what alt-function pins will output while you are messing with the registers of a disabled peripheral).
Hello,
I'm making a project where I want to bit-bang the JTAG protocol.
According to the AN4666 provided by ST, DMA + GPIO can achieve high speeds in bit-banging synchronous protocols.
I want to:
Generate N PWM pulses (the CLK signal).
With the falling edge of each pulses, I want to set some GPIO with DMA.
With the rising edge, I want to read from the GPIO using DMA.
What is the best way to achieve these specs using HAL?
even withtout dma you can reach quite high freq bit banged i/o i'll say in range 2 - 10MHz assuming fast enougth mcu and gpio bus clock high enough (48 96MHz)
Clock just wan't be as stable and may suffer "stall" say idle time when iterrupt occur vs dma. but is way simpler
for DMA base , if you use 3 bit of one port, one for clk and one for TDI and one for TDO then use 2 dma one to wr and one that rd on same timer source (if possible) at double rate of the TCK signal
the data in is rebuilt by taking teh i bit of one read data over 2
index like 0 2 4 or 1 3 5 ... depending on edge you want and how you wr clk array in mem is coded.
last if your jtag chain is 8 bit multiple SPI is even simpler and dma easy ;)
I want to generate clock for PCA9959 LED driver with my STM32L552. The LED driver needs an external clock at 20 MHz (+/- 15%). I'm trying to generate a 22 MHz clock on port PA8 on STM32L552. I managed to generate a PWM on port PA8, but I can't reach the frequency of ~22Mhz. I arrive at a maximum of 8Mhz.
Here are the PWM parameters:
I'm not sure I filled in the pwm parameters correctly. Normally with his settings I guess I should have a 22 MHz PWM with a 20% duty cycle.
PWM (MHz) = SystemCoreClock (MHz) / Prescaler => 22MhZ = 110MHz / 5
My clock configuration:
Thanks for your help.
The easiest way to output a high speed clock like this is with the MCO peripheral, rather than a timer. Fortunately for you the MCO pin is PA8. Perhaps the person who designed your board knew this and intended you to use MCO. Read the reference manual to see how.
If you do want to use a timer to do 22MHz, then as you have correctly identified you cannot get a 50% duty-cycle on your PWM. I would recommend starting with a 40% or 60%, with an output-compare value of 2-out-of-5 or 3-out-of-5, not 1 as you have above.
There is no detail in the PCA9959 datasheet about what the required mark-space ratio of the clock is, but I guess anything other than 50% could be a problem. You would be better to divide the clock by an even number. Either just divide 110MHz by 6 and output 18.33MHz, or else slow your core down a bit and divide by 4 (reduce the N parameter of your PLL).
Whether you use MCO or PWM don't forget to set the GPIO pin mode to the fastest slew rate available. Maybe the 8MHz you are measuring is the result of aliasing a faster clock that has been through the wrong GPIO mode. You could test this using a scope with at least 100MHz bandwidth.
The clock configurator in STM32CubeMX does not allow the PLL divider DIVP1 frequency to exceed 300MHz so it is impossible to use it to achieve the board's maximum of 480MHz. To do this you must go into the code for the configurator and manually change the multipliers. Is this confusion on my part or an error with the data provided by ST for the board?
Checking CPU performance singing a hardcoded assembler timing loop the subtract and branch instructions of the timing circuit take two clock cycles. On my Nucleo-H723ZG board these two take a total of one cycle. Is DUAL ISSUING not available on H743?
Once again in the STM32CubeMX in the System RCC section Master_Clock_Output_1 is highlighted in RED. (Conflict with: USB_OTG_FS: Activate_SOF). What is this all about?
You need to have the correct voltage scale (VOS) which affects the maximum clock directly. To clock this device at 480MHz.
As for your pin conflict - the MCO pin is a clock output to use for clocking external devices. Pins in the STM32 chip can be multiplexed such that they can serve multiple functions, such as ADC1_CH4 GPIO_OUT etc... You have a conflict that 1 pin is trying to facilitate 2 functionalities, and such you have a conflict. rearrange the functionality or pin to fix the conflict.
Is it possible to measure 3 specific resistor values by using GPIO / Without using a full ADC setup?
I have an alarm sensor that I want to hook up to my GPIO. This sensor has 3 specific resistors value, based on it's state:
1) Normal - 4k7
2) Alarm - 9k3
3) Tamper - infinite.
Due to long lines, I would prefer 12V power on one side.
I would like to be able to detect these states by 2 normal GPIO input pins.
Is that even possible? What would be the schematic needed for this?
Or is the only solution to use (external) ADC's?
I am thinking about a voltage diver with resistors and a 1N4148 diode to clip it to 3v3. But so far my results are unfruitfull.
Thanks.
The problem here is you have three levels to measure. If we had two we could use a simple resistor divider setup to make (say) the 4k7 and 9k3 outputs on the sensor to logic 0 (<=0.8V) or logic 1 (>=1.3V) on a single GPIO pin. We could do this on two GPIO pins if we had two "independent samples" of the sensor output rather than one.
Given the above it is possible to design some simple logic network to do the comparisons but as the other comment mentions you're off into the realms of electronics.
ADC is the simplest way to go if you want to stay in the software domain. The are other SBC devices e.g. ESP8266 which have onboard ADC functionality and built-in Wifi https://esp8266-projects.org/2015/03/internal-adc-esp8266/ or you can hook up an add-on ADC to the Rpi for example https://learn.adafruit.com/raspberry-pi-analog-to-digital-converters
Good luck