Question is pretty much self-explanatory. I'm working with naming USB drives if that matters.
Thanks.
32 characters in NTFS, 11 in FAT.
The max length for a drive label name is, according to this link, 11 characters.
Related
I've just played around with SHA256, and I've noticed something weird: the length of the hexdigest is 32 chars, each can be one of 16 different characters (0-9, a-f). Now correct me if I'm wrong, but this is not 256. 16*32 makes 512.
So... what am I missing here? Why the extra 16 letters?
Thanks in advance for your help.
First of all, this is not really my answer, it was #kelaka that set me stright on the path to an answer in the comment - so I'm not getting to excited about myself.
I was trying to calculate the number of options wrong, but multiplying 16 and 64 (the real length of a hash). If I calculated it the way it should have been - 16 ^ 64, I'd get a large number that is equal to 2^256, as can be seen in this code here:
>>> 16**64 == 2**256
True
Sorry for wasting everyone's time on me being stupid.
I am working on a software to encode postal addresses using the PostBar barcode symbology in use in Canada.
I can't find the relevant information for these codes. Wikipedia does describe PostBars, but with a caveat saying that the article is about the D12 type, whereas the Canadian Post actually uses the types D52.01/D82.01/S52.40 and S82.39, which are different and undocumented. (I also know the "CANADA POST CORPORATION 4-STATE BAR CODE HANDBOOK" document, which doesn't help.)
I need the specifics of the encoding of the fields (DCI, Postal Code, Address Locator...) and the parameters of Reed-Solomon parity bits.
I am not after an implementation, which I am able to craft myself. Thank you in advance for any tip.
This is the only thing I could find on the subject. It is not much, I'm afraid:
https://en.wikipedia.org/wiki/Canada_Post#Barcodes
Canada Post uses a 13 character barcode for their pre-printed labels. Bar codes consist of two letters, followed by eight sequence digits, and a ninth digit which is the check digit. The last two characters are the letters CA. The check digit seems to ignore the letters and only concern itself with the first 8 numeric digits. The scheme is to multiply each of those 8 digits by a different weighting factor, (8 6 4 2 3 5 9 7). Add up the total of all of these multiplications and divide by 11. The remainder after dividing by 11 gives a number from 0 to 10. Subtracting this from 11 gives a number from 1 to 11. That result is the check digit, except in the two cases where it is 10 or 11. If 10 it is then changed to a 0, and if 11 then it is changed to a 5. The check digit may be used to verify if a barcode scan is correct, or if a manual entry of the barcode is correct.
And as bonus, an explanation of the barcodes, in Dutch:
https://www.postnl.nl/Images/Brochure-KIX-code-van-PostNL_tcm10-10210.pdf
I don't think we ( Canada Post ) use PostBar anymore. Management made adoption too much of a pain for the mailer so it died. I haven't seen one on an envelope in years. Now that OCR tech is so good it wouldn't help that much to include a PostBar anyway.
What they should have done is given away software that printed up the address labels in alpha-numeric order of the postal code and printed a bunch of positional marks on the top fold of the envelope based on that same postal code. That way a postal clerk need not even take the mail out of the box to see where it should be shipped to. LVM's (large volume mailers) would do this for a rebate on their bill.
Ase for smaller businesses or the general public we should have just soled them prepaid envelopes in 2 or 3 standard sizes for a dime less than the cost of a stamp alone. A standard envelop can have a dedicated spot for a machine readable postal code. I would have gone with good old public-domain Braille! printed or in sharpy:-) Oh well I'm rambling now I'll stop.
I'm revising for an exam and i've came across a question that I have no idea how to do, i've looked through my notes and cant seem to find anything on it, can anyone help me?
Given a 64KB cache that contains 1024 blocks with 64 bytes per block, what is the size of the tag field for a 32-bit architecture?
The question is only worth 1 mark so i cant imagine the answer is too hard, but i cant seem to find anthing on it.
You need 32 bits for the address. You need 6 bits for the offset within a block. You need 10 bits to identify one of the 1,024 possible blocks in the cache. That's 16 bits in total. Therefore the tag needs to be 32 bits - 16 bits = 16 bits.
I recommend following the link that aruisdante provided and look at how to calculate this yourself.
I'm creating a virtual machine and I'm encoding the instructions into byte code. The instructions are hexadecimal numbers like this: 0x1064, this instruction means load the value of 100 (hexadecimal 64) into register 0 and the number of the load instruction is 1. My question is, if I wanted to load a larger number I would change the 64 to a larger number 3E8 for example (1000 in hexadecimal) the instruction would be 5 characters long, is it possible to keep the instructions the same length some how?
It is certainly possible to keep the instructions the same length. In fact, it is possible to having a turing complete language using only one instruction! The question is what you want to do.
For simplicity of decoding, you may just decide to have all the instructions be the same length. It increases the size of the code, but either way it doesn't really matter. Just do whatever you think is the best.
While reading one Freescale processor manual I stuck somewhere, which specifies that it is a 32-bit processor.
May I know the exact meaning and logic behind that?
Update:
Does it specify its ALU width or its address width or its register width specifically or all of them together is N-bit each.
Update:
Hope you have heard of Freescale processors. I just came across their site which describes one of their latest Starcore-based processor known as SC3850 as a 16-bit processor. As far as I know, it has 32 bit program counters, including ALU, and 40-bit register width and 2x64 bit address bus width. Also the SC3850 can handle SIMD(2) instructions which are of 32 bit or 64 bit.
For more details please go through this link
One of the major reasons you would care about the register width of the processor is performance. Generally doubling the number of bits doubles the rate at which a processor can move data around, and compute. This is why we're not all using 8 bit processors.
The other major reason is address space. A 16 bit program counter limits you to 64k of address space, and a 32 bit counter limits you to 4 gigabytes. The new 64 bit processors make it possible, if all the address lines are present, to support 17,179,869,184 gigabytes of memory.
Firstly i dont have a definitive answer but i would guess that 8 being a power of 2, is an important factor. Being a power of 2 also means that certain optimisations may be performed by dividing the 8 bits into groups which also means lookup tables can be used for certain operations. 8 bits in the past was also the perfect size when dealing wiht plain old ascii characters. I can imagine that using 5 bit bytes and encoding a string of ascii characters across memory would be a pain.
Please check out the Wikipedia entry on 32-bit processors, from the entry:
In computer architecture, 32-bit
integers, memory addresses, or other
data units are those that are at most
32 bits (4 octets) wide. Also, 32-bit
CPU and ALU architectures are those
that are based on registers, address
buses, or data buses of that size.
32-bit is also a term given to a
generation of computers in which
32-bit processors were the norm.
Read and understand the article - then the answer for N will be obvious.