I am trying to read a text file in matlab and convert it into bits. I then want to access and store them in a register in my module in verilog. I then use these bits inside the module. Can I do this? If yes, how? Thank you.
There are a couple of ways to read a text file into Verilog and strore numeric values into a variable. The easiest way is to use the $readmemb system task and store the values into a reg array.
Another way which is a little more work, but is also more flexible, is to use the $fopen system task. Refer to the IEEE Verilog Std (1800-2009, for example).
Related
I'm wondering how/if one converts a .dat file into something modifiable and readable. Any info would vastly help. For example a code snippet, program, or just general information.
I generally use hexdump, but it's not available for all operating systems, and probably wouldn't help you more than what you're looking at now.
As already pointed out in comments, DAT is a generic extension used to signify a (usually proprietary) binary format -- other than not being text, there's no commonality. You need to know what format it's in before you can have any hope of translating it into something legible by humans.
All we "know" from the extension is that the file is NOT line-based text -- and that could be wrong.
I am writing a Testbench using Systemverilog and I want to have the freedom to choose in each test to either randomize some variables or specify their value (from a .do file or from command line). Is there any option in Systemverilog to do this?
There are many things you can do, but the simplest is putting +some_variable=value on the command line, and then in your code
if (!$value$plusargs("some_variable=%0d",some_variable)
some_variable = $urandom;
Declare a variable and use $urandom or $urandom_range to generate random values. When you want to pass values from the command line, you can use $value$plusargs.
Read up on Chapter 21 (Input/output system tasks) of the LRM to find examples.
I want to have a std.m file for the standard deviation. It is in data fun toolbox, but, by mistake, I changed the code and the std command is not working anymore. How can I run the original std (standard deviation) command?
Taking all the comments out, the function std.m is actually extremely simple:
function y = std(varargin)
y = sqrt(var(varargin{:}));
This is the definition of the standard deviation: the square root of the Variance.
Set built-in functions to Read-Only
Now don't go breaking the var.m file because it is more complex and I wonder if there would be copyright issue to display the listing here.
To avoid the problem of breaking built-in files, it is advisable to set all your Matlab toolbox files as Read Only. I remember old Matlab installer giving the option to do that at install time. I don't know if the installer still offers the option, but if not it is extremely easy to do it manually (on Windows, just select your folders, right-click Properties, tick read only and accept to propagate the property to all subfolders and files).
Overloading
Once this is done, your built-in files are safe. You can still modify the default behavior of a built-in function by overloading it. This consist in writing a function with the same name and arrange for it to be called before the default function (your overload function becomes the default one).
This article explain how to overload user functions.
Matlab does not recommend to directly overload the built-in functions (rather call it another name like mySTD.m for example), but if you insist it is perfectly feasible and still a much better option than modifying the built-in function... at least the original function is still intact somewhere.
is there a tool or script somewhere that allows me to parse Verilog files to obtain the names of the inputs and outputs of the module? i tried to look at iverilog and yosys but they do not seem to have this feature. i can write my own but i do not want to reinvent the wheel. thanks!
Verilog-Perl can parse Verilog to obtain the names of the inputs and outputs of the module. It is free software which can be downloaded and installed. There are many code examples to do what you want, but it does require some knowledge of the Perl language. You are wise to not want to reinvent this wheel.
Tools like ModelSim/Questa has a Tcl command find -ports that does this for you. You can also use the Verilog VPI, but not with the free version of ModelSim.
I am importing a dataset into Stata with a lot of variables (~250), a majority of which need to be read into Stata as strings, so I was wandering if instead of writing a painfully long dictionary file, I could just tell Stata to read all variables as strings, and then go back in and convert the few variables back to numeric as needed.
You could certainly try that. Stata has a destring command intended to be as smart as possible, but you may need to do more work than just destring, replace.