I am using a USB device from FTDI called FT4232H and I want to write on the EEPROM to make sure that some pins are set to inputs at start. I am using the D2XX drivers (pdf here). Here I found at page 106 that there is a struct called FT_EEPROM_4232H. Could this be something to use to make sure the pins are set to inputs at the beginning or is this totaly wrong? There are four UCHAR variables called A-, B-, C- and DDriverType. Does anyone know what these should be used for?
I realise this question is 3 months old now but I believe pins on the FTx232H series of chips only get set as GPIO once the MPSSE command SetOutput is issued.
The EEPROM configuration is used to define things like drive strength, slew rate and whether the pin is a schmitt input and what each of the 4 ports are set up to be (async FIFO akin to FT245 series, serial port (FT232), etc).
If anyone else can disprove this, I would be interested to know also!
I just plugged my FT232H board in my PC and ran FTDI FT_Prog, it does not appears you can control the GPIO mode input/output at start time. There is nothing in the FTDI FT_Prog UI that allow to set a mode for GPIO pins and set them as input.
I did set programmatically my FT232H board as an SPI device with 8 GPIOS
but this was done after the chip was started.
A video experimenting with the FT232H
I also once asked FTDI support a similar question for the FT232RL which is as default a UART and I asked if there was a way to configure the chip to start in Synchronous bit banging mode and set the GPIOs as OUTPUT. The answer was no.
The FT232RL will always start as a UART and then by software I can activate Synchronous bit banging mode, and set the mode of my GPIO.
I suppose it is the same for the FT232H, FT2232H and FT4232H.
Related
I am using a STM32F030F4P6 MCU and a LCD 2004 with PCF8574T I2C display driver. I have tried the library from this tutorial: https://controllerstech.com/interface-lcd-16x2-with-stm32-without-i2c/. I have found a datasheet for the PCF8574T device, but there are no commands specified in there. I am quite new in the field, but I already communicated with other devices over I2C and SPI and got them to work. Can somebody tell me what I am doing wrong, or at least show me where to get a datasheet with commands for the device? I am sorry in advance if this is a noob question.
As already mentioned, PCF8574T - is an i2c expander. So you need to write a driver which manipulates data pins on PCF8574T in way described in tutorial you found.
Check the arduino code for this type of LCD. It may save your time/ https://github.com/fdebrabander/Arduino-LiquidCrystal-I2C-library
If you have an Arduino board, you can test your LCD according this tutorial https://create.arduino.cc/projecthub/Arnov_Sharma_makes/lcd-i2c-tutorial-664e5a
Nice to know that your device still alive before debug the code.
Good day
The problem:
I am trying to connect/flash/debug a Olimax STM32-E407 dev board over SWD and I am not able
When trying to connect, using CubeProgrammer, I get: "No STM32 Target Found"
What I have tried:
I have connected a ST-link V3 mini to the pinout of the the 20pin header of the Olimax board including 3.3V, GND, SWDIO (PA13/Pin7), SWCLK (PA14/Pin9) and NRST (Pin15).
I am powering the powering the board from a power supply into the power jack
All jumpers and solder bridges are in stock places.
I have also tried manually pulling NRST to ground and doing a full chip erase, but that has not worked either.
I have used these ST-link debuggers on other boards I made and it works perfectly fine
I have 3 Olimax boards and none of them work
Any help would he hugely appreciated.
Debugging problems on microcontrollers have two general common methodes.
Hardware Problems:
In this part, it is highly recommended that use an oscilloscope to monitor circuit.
Make sure the microcontroller is powered with a correct and stable power supply.
Check the soldering quality and there is no short circuit on the board (especially between ground pins and other pins).
Check the NRST pin is high when the board is powered.
Remember that this reset is active low so during programming or debugging this pin should be high. Also, check this pin is debounced with a capacitor.
Also you can check the JTAG pins signals with an Oscilloscope to check if the programmer device is working fine.
Sometimes adding a capacitor between debugging pins and GND increases the bus capacitance and solves the problem. The value of the capacitor should be found by trying.
Software Problems
Check the programmer driver is correctly installed on your PC.
Check the programming method is true(for example maybe the board is designed to be programmed with SWD, not JATG).
Sometimes reducing the programming clock of the programmer solved the problem.
If all of these methods didn't work and you are sure that the board is fine, probably the programmer is broken, so change the programmer with another one.
I am trying to connect an analogue to digital converter to the raspberry pi. As far as I am able to understand, the RPi doesn't support Bi-directional SPI mode. The adc I am using says it is SPI compatible but only has the inputs SCLK, CNV and outputs CLKOUT+ and CLKOUT- and SD0+ and SD0-. This leads me to understand that it will only work with bi-directional SPI as there is only the serial data out. I am thinking of using a PWM for CNV (which I think CE), GPIO clock for SCLK and then an interrupt on the falling edge of the GPIO clock to just digitally read each bit from the adc. I don't understand SPI in detail but from what I've read quite often it requires sending data in order to receive it. Do you know if the setup I mentioned (without using SPI) will work? Or am I missing something about SPI and the adc will work with that while not in bi-directional mode?
We are using the Raspberry Pi 3 b
adc - http://cds.linear.com/docs/en/datasheet/232316fa.pdf
Thanks for any help you can provide.
Read the data sheet carefully, in particular pages 8 and 9. I suggest that you tie CMOS/LVDS pin to ground to enable CMOS mode. Then use only the "+"-pins. Use the SCK for SPI clock, SD01+ for SPI data input to the Rpi. Connect a GPIO pin to CNV.
Also observe that the RPi runs at 3.3V, and the ADC's max rating is also 3v3, that is running the IC right to the edge.
The Arm processor on one of our boards has an spi port with two chip select lines.
It is mentioned in the processor's datasheet that it can control upto two spi devices.
Is it possible to use a GPIO as a slave select for an additional spi device?
How to modify the existing libraries/device drivers to support this change?
So far i've found a file in the kernel's source which contains the addresses of SPI port pins. Can anyone plz tell in which direction should i proceed?
If you have enough pins, you can bitbang the whole SPI protocol and use as many CS as you need.
You don't mention what processor it is. You have three possibilities.
If the processor has an i/o mux capabilities, turn off the SPI chip select functionality. The SPI controller will think it has asserted the line, but it won't go external.
Don't connect one SPI chip select. Use a pull-up/down for ESD protection.
Multiplex the chip select as per Joachim Isaksson
In first two cases, connect GPIOs to the additional device's chip select. Toggle the GPIO manually before running spi_write(), etc. This will allow the SPI controller to transfer at higher rates than are possible with bit banging and is a better system design. Ie, lower power consumption, lower CPU use, faster data rates, etc. If the peripheral is just for setup/boot, then the bit banging makes sense for simplicity. However, if your main operation depends on the SPI bus, you could consider this solution.
If only one peripheral needs the SPI for setup AND you have the i/o mux, you can disable the chip select functionality during setup, using a GPIO to select the setup peripheral and then re-enable the spi chip select during standard system operation for the other peripheral.
Using a GPIO doesn't require user space intervention. Drivers can provide call backs to set the GPIO when in use, so SPI commands can be buffered/queued and these solutions still work. For instance, the IMX SPI driver supports GPIO toggle by passing a negative chip select number to denote a GPIO id.
Note: Some SPI devices may require the chip select to toggle between words; what ever a word is for the device. Some controller may leave the chip select asserted when transferring multiple words. You need to get this right if you use a GPIO to manually select devices. I am sure some standard defines this, but definitely some device don't follow the standard.
Addendum: Most drivers support a GPIO chip select; via a negative chip select value. They will call Linux GPIO functions. Write a GPIO handler that does the de-multiplexing. No need to alter the SPI drivers.
The Arm processor on one of our boards has an spi port with two chip select lines.
It is mentioned in the processor's datasheet that it can control upto two spi devices.
Is it possible to use a GPIO as a slave select for an additional spi device?
How to modify the existing libraries/device drivers to support this change?
So far i've found a file in the kernel's source which contains the addresses of SPI port pins. Can anyone plz tell in which direction should i proceed?
If you have enough pins, you can bitbang the whole SPI protocol and use as many CS as you need.
You don't mention what processor it is. You have three possibilities.
If the processor has an i/o mux capabilities, turn off the SPI chip select functionality. The SPI controller will think it has asserted the line, but it won't go external.
Don't connect one SPI chip select. Use a pull-up/down for ESD protection.
Multiplex the chip select as per Joachim Isaksson
In first two cases, connect GPIOs to the additional device's chip select. Toggle the GPIO manually before running spi_write(), etc. This will allow the SPI controller to transfer at higher rates than are possible with bit banging and is a better system design. Ie, lower power consumption, lower CPU use, faster data rates, etc. If the peripheral is just for setup/boot, then the bit banging makes sense for simplicity. However, if your main operation depends on the SPI bus, you could consider this solution.
If only one peripheral needs the SPI for setup AND you have the i/o mux, you can disable the chip select functionality during setup, using a GPIO to select the setup peripheral and then re-enable the spi chip select during standard system operation for the other peripheral.
Using a GPIO doesn't require user space intervention. Drivers can provide call backs to set the GPIO when in use, so SPI commands can be buffered/queued and these solutions still work. For instance, the IMX SPI driver supports GPIO toggle by passing a negative chip select number to denote a GPIO id.
Note: Some SPI devices may require the chip select to toggle between words; what ever a word is for the device. Some controller may leave the chip select asserted when transferring multiple words. You need to get this right if you use a GPIO to manually select devices. I am sure some standard defines this, but definitely some device don't follow the standard.
Addendum: Most drivers support a GPIO chip select; via a negative chip select value. They will call Linux GPIO functions. Write a GPIO handler that does the de-multiplexing. No need to alter the SPI drivers.