Doxygen parses iso646.h during #if macro preprocessing with warning - macros

Doxygen 1.8.8 does "warning: preprocessing issue while doing constant expression evaluation"
It can see "iso646.h" ok (it's used all over for logical expressions in C code with no warnings), the warning is only in conditional macro expension like:
#if ((FILENO_A == FILENO_P_AUTROKEEPER_A) or \
(FILENO_A == FILENO_P_AUTROKEEPER_F1_A) or \
(FILENO_A == FILENO_P_AUTROKEEPER_FA_A) or \
(FILENO_A == FILENO_P_AUTROKEEPER_FE_A) or \
(FILENO_A == FILENO_P_AUTROKEEPER_FC_A))
... External functions in P_AutroKeeper_f1.c (GENERAL, also from PROCESS)
#end
We have tried quite much here!-(

Related

Getting unexpected behavior with multiple OR conditions

Here is my code:
df.where((F.col("A") != F.col("B")) | \
(F.col("A").isNotNull()) | \
(F.col("C") == F.col("D"))).show()
When I do this, I do see instances that contradict some of the conditions above. Now, when I structure the code like this, it runs successfully:
df.where((F.col("A") != F.col("B")))\
.where((F.col("A").isNotNull()))\
.where((F.col("C") == F.col("D")))
The first snipper uses the | to combine the three conditions.However, the | checks if any of the conditions evaluate to true rather than all of them.
However, chaining using where clause is equivalent to combining the conditions using and.
Hence, the snippets in the code are not equivalent and produce different results.
For equivalence, you first snipper will become
df.where((F.col("A") != F.col("B")) & \
(F.col("A").isNotNull()) & \
(F.col("C") == F.col("D"))).show()

how to pass +, -, etc. to macro in Nim

I want to do something like this macro in Nim
#define BINARY_OP(op) \
do { \
double left = getLast(); \
double right = getLast(); \
push(right op left); \
} while (false)
I tried to do this:
macro binaryOp(op: untyped) =
let right = getLast()
let left = getLast()
vm.push(left op right)
But the compiler throws an error:
Error: attempting to call routine: 'op'
How can I fix this?
Update
I want to use the macro like this:
binaryop(+)
Nim macros are not like C macros, they're code generators that take in source code. What you want is a template, which is akin to C macros, but still more sophisticated.
template binaryOp(op: untyped) =
let right = 10
let left = 20
echo op(left, right)
binaryOp(`+`)
In this case you need to use backticks to lexically strop +, explained here.

How to pass debug messages to a macro in SystemVerilog

I'm attempting the following SystemVerilog:
`define DEBUG (ARG) \
`ifdef DEBUG_ON \
$display ARG;
`endif
module my_mod;
logic a;
logic [1:0] b;
assign a = 1'b0;
assign b = 2'b01;
`DEBUG(("a=%x, b=%b", a, b))
endmodule
VCS gives me the following compile error:
Error-[SE] Syntax error
Following verilog source has syntax error :
"/media/psf/Home/projects/dep2/hw/rtl/dep_dc/dep_dc_cs.sv", 254 (expanding
macro): token is '('
`DEBUG(("a=%x, b=%b", a, b))
^
#0, DEBUG : "<my_file>":21
full expansion of macro (DEBUG), error at line 1
=>(ARG)
`ifdef DEP_DEBUG_ON
...
According to this answer: How to emulate $display using Verilog Macros?
This seems like the correct syntax to me. Can someone spot anything wrong?
So I found it apparently, the compiler doesn't like spaces between the macro definition and arguments:
`define DEBUG(ARG) \
`ifdef DEBUG_ON \
$display ARG;
`endif
Works.

Quote macro literal string argument inside string

I have the following macro:
`define check(CONDITION) \
begin \
if (!(CONDITION)) \
$display("'%s' failed.", `"CONDITION`"); \
end
And the following expansions:
module test;
initial begin
`check(0)
`check(1 == 0)
end
endmodule
They print the following:
'0' failed.
'1 == 0' failed.
If I have a condition over strings, though, then the macro expansion won't work properly. Concretely, adding the following line leads to a compile error:
`check("foo" == "bar")
What I would like, though, is to have the following printed:
'"foo" == "bar"' failed.
Is there a way to write the macro body that would allow this? I would like to avoid solutions where I have two macros, one where strings aren't allowed inside the condition and one explicitly for strings.
You can't do this with just one macro in SystemVerilog. It would take something like the qq() operator in PERL for this to work.

Calling a macro

I have the following macro:
#define testMethod(a, b) \
if (a.length > b.length) \
return a; \
return b;
When I try to call it with:
NSString *s = testMethod(#"fir", #"sec");
I get an error:
"Excepted ";" at end of declaration"
Why?
if is a statement, not an expression. It can't return a value like that.
You probably mean:
#define testMethod(a, b) ((a).length > (b).length ? (a) : (b))
The extra parenthesis around the arguments on the right side are common, and are there to protect you against unexpected precendence-related incidents.
Also note that because the above is pre-processed by doing textual replacement, it will probably construct more objects than the equivalent function would.
If you want to use the macro within expressions, it should be defined as an expression itself, not as a group of statements. You end up with a syntax error because the macro is literally substituted, and statements are not allowed within another statement.
GCC has an extension called "statement expressions" that can help you achieve this, but it is non-standard:
#define testMethod(a, b) ({ \
typeof(a) result = (a).length > (b).length ? (a) : (b); \
result; \
})
Actually, in your case none of this is needed because the statements can be easily converted to an expression:
#define testMethod(a, b) ((a).length > (b).length ? (a) : (b))
You need not to use the return statement... try to use the following code
#define testMethod(a,b) ((a) < (b) ? (a) : (b))
may this will help you..