I am currently trying to use SYS/BIOS 6.37.5.35 with xdctools version 3.25.6.96 with a F2812 platform.
The issue I am having is when I try to set up PLL configuration I get a warning saying
PLL type is not assigned, so the Boot module will not configure PLL
This because of the following code in Platform.xs
if (this.deviceName.match(/2837/) || this.deviceName.match(/2807/)) {
var Boot = xdc.useModule('ti.catalog.c2800.initF2837x.Boot');
Boot.configureClocks = true;
}
else {
var Boot = xdc.useModule('ti.catalog.c2800.init.Boot');
Boot.disableWatchdog = true;
Boot.configurePll = true;
Boot.pllcrDIV = 10;
Boot.pllstsDIVSEL = 2;
/*
* Set the Boot.pllType based on device name. We set pllType
* to undefined for the devices that we don't support.
*/
if (this.deviceName.match(/2802[0-9]/) ||
this.deviceName.match(/2803[0-9]/) ||
this.deviceName.match(/2805[0-9]/) ||
this.deviceName.match(/2806[0-9]/)) {
Boot.pllType = Boot.Type_2802x_2803x_2806x;
}
else if (this.deviceName.match(/2823[0-9]/) ||
this.deviceName.match(/2833[0-9]/)) {
Boot.pllType = Boot.Type_282xx_283xx;
}
else if (this.deviceName.match(/2834[0-9]/)) {
Boot.pllType = Boot.Type_2834x;
}
else {
Boot.configurePll = false; /* do not set up PLL */
Boot.pllType = undefined; /* unknown device */
/* if get here the PLL type is not assigned, throw warning ... */
this.$module.$logWarning("The PLL type is not assigned, so the Boot"
+ " module will not configure the PLL.", this);
}
}
Does this mean PLL configuration is not supported for 2812 in sys/bios?
Thanks & Regards,
Nikhil Kotian.
I found in the documentation that the PLL cannot be configured for 2812 on SYS/BIOS. Therefore, the PLL needs to be configured by setting the PLLCR register.
Related
I am using an STM32G030C8T6 as an SPI (Slave device) which receives characters from a Raspberry pi (Master device), receiving works perfectly! no problems there, however when i try to send data from STM32 to Pi, it seems that the STM32 gets stuck for a while and Pi rx buffer is filled with only one bit in repeat e.g., if i send char buf[6] = {0,1,2,3,4,5}; Pi receives (111111) or (333333) depending on how many characters i am sending.
What do i actually want to do?
I want to transmit ADC data from STM32(slave mode) to Pi(master mode), so far it only receives one bit i repeat.
Can someone please help me achieve this?
Here's my SPI config:
void MX_SPI1_Init(void)
{
/* USER CODE BEGIN SPI1_Init 0 */
/* USER CODE END SPI1_Init 0 */
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_SLAVE;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_SOFT;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 7;
hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
hspi1.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
then the functions to read characters, send data and string
char SPI_read(void)
{
// SPI1->SR is the STATUS REGISTER on SPI1 Bus
// SPI1->DR is the DATA REGISTER on SPI1 Bus
char data;
while(!(SPI1->SR & SPI_SR_RXNE));
while(SPI1->SR & SPI_SR_BSY);
data = SPI1->DR;
printmsg("%c",data);
return data;
}
void spi_Send(char caracSend)
{
while(!(SPI1->SR & SPI_SR_TXE));
SPI1->DR = caracSend;
}
void spi_send_string(char* stringSend)
{
int i=0;
unsigned int sizeChar = 0;
sizeChar = strlen(stringSend);
__NOP();
for(i=0;i<sizeChar;i++)
{
spi_Send(stringSend[i]);
}
}
Here's my function to receive data from Pi which i call in the main while loop.
void SPI_Receive_Commands(void)
{
while(HAL_GPIO_ReadPin(SPI_SS_GPIO_Port, SPI_SS_Pin) == GPIO_PIN_RESET);
{
HAL_SPI_Receive(&hspi1, (uint8_t *)spi_buf, 10, 100);
if(spi_buf[0] == 'v')
{
memset(spi_buf,'*',10);
printmsg("Character V received\r\n");
Battery_Voltage();
spi_send_string(batteryVoltage);
spi_Send('v');
printmsg("Sending battery voltage\r\n");
}
}
}
Thank you so much for helping me out in advance.
Initialisation. You need set the RX FIFO threshold to 1/4 as you read and write bytes. I do not know how to do it in HAL. Register level simply set FRXTH bit in the CR2 register
DR register has to be accessed in 8 bits operations.
You do not need to use BSY bit in polling mode unless you want to disable the SPI peripheral.
void spi_Send(char caracSend)
{
while(!(SPI1->SR & SPI_SR_TXE));
*(volatile uint8_t *)&SPI1->DR = caracSend;
}
void spi_send_string(char* str)
{
if(str) while(*str) spi_Send(*str++);
}
char SPI_read(void)
{
char data;
while(!(SPI1->SR & SPI_SR_RXNE));
data = *(volatile uint8_t *)&SPI1->DR;
return data;
}
Remember that raspberry pi HAS TO send dummy data to allow slave to send information. Slave does not generate the clock signal and clock has to be supplied by the Master
I'm working on imx8mm and testing GPIO with Linux kernel v4.14.98.
Device tree node is:
&iomuxc {
pinctrl-names = "default";
...
imx8mm-evk {
pinctrl_gpio_plural: gpiopluralgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x41
>;
};
};
};
...
plural {
compatible = "gpio-plural";
/* pinctrl-names = "default"; */
pinctrl-0 = <&pinctrl_gpio_plural>;
reset-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
and I wrote a driver to testing this
static int gpio_plural_probe(struct platform_device *pdev)
{
struct gpio_plural_data *drvdata;
drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
if (drvdata == NULL)
return -ENOMEM;
drvdata->reset = devm_gpiod_get(&pdev->dev, "reset", GPIOD_OUT_HIGH);
if (IS_ERR(drvdata->reset)) {
printk("Error: reset not found\n");
return -EINVAL;
}
gpiod_set_value(drvdata->reset, 0);
mdelay(100);
gpiod_set_value(drvdata->reset, 1);
mdelay(100);
gpiod_set_value(drvdata->reset, 0);
mdelay(100);
gpiod_set_value(drvdata->reset, 1);
return 0;
}
However, I can't control GPIO pin when I comment pinctrl-names as device tree shown above. The GPIO pin always remains high.
In devicetree.c, the statename would be replaced to propname suffix, which in here is "0". But it just a constant name which could be any string. So my question is why I can't control GPIO pin without setting pinctrl-names?
It can't be any name, most of the node will have pinctrl-names = "default"; because this make pinctrl-0 the default state for the pins of the device.
This is actually quite important because the device core will use that to retrieve and set the proper state before probing the device, see pinctrl_bind_pins. It does:
dev->pins->default_state = pinctrl_lookup_state(dev->pins->p,
PINCTRL_STATE_DEFAULT);
where PINCTRL_STATE_DEFAULT is "default".
Then, it selects the state with:
ret = pinctrl_select_state(dev->pins->p, dev->pins->init_state);
If you don't want to use the default name, then, you'll have to select the proper state in your driver.
Other generic state names are:
#define PINCTRL_STATE_DEFAULT "default"
#define PINCTRL_STATE_INIT "init"
#define PINCTRL_STATE_IDLE "idle"
#define PINCTRL_STATE_SLEEP "sleep"
Hope all is going well.
I'm trying to ping STM32H743ZI NUCLEO 144 using LWIP middle-ware. Code generated by CubeMX.
Configurations:
Set the HCLK to 400 MHz
Enabled the CPU ICache and DCache (under Cortex_M7 Configuration)
Enabled MPU (Region0, Region1 & Region2)
Enabled LWIP
Selected LAN8742 as the Driver_PHY (under LwIP>Platform Settings)
DHCP disabled (IP, MASK: 255,255,255,000 , Gateway: Modem IP)
RTOS disabled
LWIP_HTTPD, LWIP_HTTPD_CGI enabled
LWIP_HTTPD_SSI enabled
LWIP_HTTPD_MAX_TAG_NAME_LEN set to 16
ICMP enabled (LWIP_BROADCAST_PING and LWIP_MULTICAST_PING in LwIP Key Options>IPMP Options).
Code Generated for Keil V5
MX_LWIP_Process added to the main function in While loop.
while(1)
{
MX_LWIP_Process();
}
I don't know how should I configure the CubeMX or change the generated code to be able to ping my board.
My_File
this will probably help you (it did for me):
Information about this issue can be found here.
https://community.st.com/s/article/FAQ-Ethernet-not-working-on-STM32H7x3
Memory buffers need to be assigned to RAM that can be accessed by the Ethernet
peripheral.
You may need to adjust the tour stack/heap size.
The default Ethernet GPIOs speed may be too low.
You may need to configure the MPU.
You may likely need to change your linker script.
On this page you will find good information:
https://github.com/MX-Master/STM32H7_Nucleo-H743ZI_Ethernet_LwIP
The HAL_Delay mentioned may not be required, though.
In the file lan8742.c (driver), I added an extra line for the LAN8742_Init function, around line 190, to set auto-negotiation:
// Link did not come up after HW reset.
pObj->IO.WriteReg(pObj->DevAddr, LAN8742_BCR, LAN8742_BCR_AUTONEGO_EN);
So that function looks like:
// Used in ethernetif.c, 363, static void low_level_init(struct netif *netif)
int32_t LAN8742_Init(lan8742_Object_t *pObj)
{
uint32_t tickstart = 0, regvalue = 0, addr = 0;
int32_t status = LAN8742_STATUS_OK;
if(pObj->Is_Initialized == 0)
{
if(pObj->IO.Init != 0)
{
/* GPIO and Clocks initialization */
pObj->IO.Init();
}
/* for later check */
pObj->DevAddr = LAN8742_MAX_DEV_ADDR + 1;
/* Get the device address from special mode register */
for(addr = 0; addr <= LAN8742_MAX_DEV_ADDR; addr ++)
{
if(pObj->IO.ReadReg(addr, LAN8742_SMR, ®value) < 0)
{
status = LAN8742_STATUS_READ_ERROR;
/* Can't read from this device address
continue with next address */
continue;
}
if((regvalue & LAN8742_SMR_PHY_ADDR) == addr)
{
pObj->DevAddr = addr;
status = LAN8742_STATUS_OK;
break;
}
}
if(pObj->DevAddr > LAN8742_MAX_DEV_ADDR)
{
status = LAN8742_STATUS_ADDRESS_ERROR;
}
/* if device address is matched */
if(status == LAN8742_STATUS_OK)
{
/* set a software reset */
if(pObj->IO.WriteReg(pObj->DevAddr, LAN8742_BCR, LAN8742_BCR_SOFT_RESET) >= 0)
{
/* get software reset status */
if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BCR, ®value) >= 0)
{
tickstart = pObj->IO.GetTick();
/* wait until software reset is done or timeout occurred */
while(regvalue & LAN8742_BCR_SOFT_RESET)
{
if((pObj->IO.GetTick() - tickstart) <= LAN8742_SW_RESET_TO)
{
if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BCR, ®value) < 0)
{
status = LAN8742_STATUS_READ_ERROR;
break;
}
}
else
{
status = LAN8742_STATUS_RESET_TIMEOUT;
}
}
}
else
{
status = LAN8742_STATUS_READ_ERROR;
}
}
else
{
status = LAN8742_STATUS_WRITE_ERROR;
}
}
}
// Jack 2019-03-25, Link did not come up after HW reset.
pObj->IO.WriteReg(pObj->DevAddr, LAN8742_BCR, LAN8742_BCR_AUTONEGO_EN);
if(status == LAN8742_STATUS_OK)
{
tickstart = pObj->IO.GetTick();
/* Wait for 2s to perform initialization */
while((pObj->IO.GetTick() - tickstart) <= LAN8742_INIT_TO)
{
}
pObj->Is_Initialized = 1;
}
return status;
}
I am working on STM32F4 board. My IDE is IAR Embedded Work bench. I am trying to do a software reset from code. For that i used API ' NVIC_SystemReset(); ' defined in
core_cm4.h header. But the system reset is not happening.
I tried the same thing in STM32F3, same IDE . I used the function NVIC_SystemReset(); from core_sc300.h header. Using that software reset is happening. I found the definition of functions in both file are same and both controllers are Cortex M4 only.What is the problem with STM32F4 board.? Can any one help me in solving this or can any one suggest an alternative way for system reset in STM32F4.
Please help.
Thanks in advance
In the HAL You can use
HAL_NVIC_SystemReset();
You can use a watch-dog instead:
Call wdg_activate(n) in order to initiate system-reset within n milliseconds
Call wdg_reactivate() in order to reload the counter back to n milliseconds
void wdg_activate(unsigned short num_of_ms)
{
uint8_t prescale_reg;
uint8_t prescale_val;
if (num_of_ms < 1)
{
num_of_ms = 1;
prescale_reg = IWDG_Prescaler_32;
prescale_val = 1;
}
else if (num_of_ms <= 4096)
{
prescale_reg = IWDG_Prescaler_32;
prescale_val = 1;
}
else if (num_of_ms <= 8192)
{
prescale_reg = IWDG_Prescaler_64;
prescale_val = 2;
}
else if (num_of_ms <= 16384)
{
prescale_reg = IWDG_Prescaler_128;
prescale_val = 4;
}
else if (num_of_ms <= 32768)
{
prescale_reg = IWDG_Prescaler_256;
prescale_val = 8;
}
else
{
num_of_ms = 32768;
prescale_reg = IWDG_Prescaler_256;
prescale_val = 8;
}
IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
while (IWDG_GetFlagStatus(IWDG_FLAG_PVU));
IWDG_SetPrescaler(prescale_reg);
while (IWDG_GetFlagStatus(IWDG_FLAG_RVU));
IWDG_SetReload(num_of_ms/prescale_val-1);
IWDG_Enable();
}
void wdg_reactivate()
{
IWDG_ReloadCounter();
}
There have been several iterations of NVIC_SystemReset(). Please post the code for the version you are using. The current [working STM32F4] version that I am using is as follows:
/** \brief System Reset
The function initiates a system reset request to reset the MCU.
*/
__STATIC_INLINE void NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */
__DSB(); /* Ensure completion of memory access */
while(1); /* wait until reset */
}
I am trying to erase one page in flash on an STM32F103RB like so:
FLASH_Unlock();
FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPRTERR | FLASH_FLAG_OPTERR);
FLASHStatus = FLASH_ErasePage(Page);
However, FLASH_ErasePage fails producing FLASH_ERROR_WRP
Manually enabling/disabling write protection in the stm32-linker tool doesn't fix the problem.
Basically FLASH_ErasePage fails with WRP error without trying to do anything if there's previous WRP error in the status register.
What comes to your FLASH_ClearFlag call, at least FLASH_FLAG_BSY will cause assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)); to fail (though I'm not really sure what happens in this case).
#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFC0FD) == 0x00000000) && ((FLAG) != 0x00000000))
What is your page address ? Which address are you trying to access ?
For instance, this example is tested on STM32F100C8 in terms of not only erasing but also writing data correctly.
http://www.ozturkibrahim.com/TR/eeprom-emulation-on-stm32/
If using the HAL driver, your code might look like this (cut'n paste from an real project)
static HAL_StatusTypeDef Erase_Main_Program ()
{
FLASH_EraseInitTypeDef ins;
uint32_t sectorerror;
ins.TypeErase = FLASH_TYPEERASE_SECTORS;
ins.Banks = FLASH_BANK_1; /* Do not care, used for mass-erase */
#warning We currently erase from sector 2 (only keep 64KB of flash for boot))
ins.Sector = FLASH_SECTOR_4;
ins.NbSectors = 4;
ins.VoltageRange = FLASH_VOLTAGE_RANGE_3; /* voltage-range defines how big blocks can be erased at the same time */
return HAL_FLASHEx_Erase (&ins, §orerror);
}
The internal function in the HAL driver that actually does the work
void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
{
uint32_t tmp_psize = 0U;
/* Check the parameters */
assert_param(IS_FLASH_SECTOR(Sector));
assert_param(IS_VOLTAGERANGE(VoltageRange));
if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
{
tmp_psize = FLASH_PSIZE_BYTE;
}
else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
{
tmp_psize = FLASH_PSIZE_HALF_WORD;
}
else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
{
tmp_psize = FLASH_PSIZE_WORD;
}
else
{
tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
}
/* If the previous operation is completed, proceed to erase the sector */
CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
FLASH->CR |= tmp_psize;
CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
FLASH->CR |= FLASH_CR_STRT;
}
Second thing to check. Is interrupts enabled, and is there any hardware access between the unlock call and the erase call?
I hope this helps