I2C Reset Protocol Test - i2c

I am developing Slave module with I2C interface using stm32L1, in this module i want to test my I2C Reset Protocol.
How can i Perform this test to verify my i2c Reset working?
Bascilly the Reset Protocol is like:
1.The master shall provide up to nine SCL clock cycle (drive low, then high) to
the slave
2.The master shall monitor SDA while SCL is high on each cycle.
3.If the slave releases SDA, it will be high and the master shall initiate a
START operation
4.If SDA remains low after a full nine clock cycles the protocol reset has
failed
Thanks

Related

What to do when a linux one-wire master determines one of it's slaves is no longer present?

I'm writing a linux driver for a DS2484 I2C one wire master, and an accompanying one-wire slave driver for a DS28E84 "DeepCover Radiation-Resistant, High-Capacity, 1-Wire Authenticator". The slaves in our system are hot-pluggable but only slave one may be attached to a one-wire master at any time. There are multiple masters in our system, so there could be more than 1 active slave present at a time.
I have written a "search" function in the master driver that successfully detects when a slave has been attached to the system, and that information is getting properly passed to the "wire" driver so the correct slave driver is associated with a slave device when the search function detects that new slave is present.
I'm unclear how to indicate back to the "wire" driver that the unplugged slave is no longer present. It isn't something the slave device can signal by itself because slaves can get unplugged without warning at any time. The master can determine when the slave has been unplugged, but I'm not sure how the master driver signals to the "wire" driver that the slave should be removed.
I've tried adding a check in the "search" function to see if a previously present device is no longer present, and if so clearing the "W1_SLAVE_ACTIVE" bit in the flags for that missing slave. I was hoping that would trigger the w1_slave_detach() function in the "wire" driver, but that didn't work.
By reading through the code for the "wire" driver, I discovered that the "wire" driver does automatically remove a slave when that slave doesn't report present from the master's search function. However, that removal doesn't necessarily happen the first time the slave isn't present in a search. Instead there is a counter that keeps track of how many times the slave didn't report present. The slave has to miss reporting present for more than a certain number of searches before the "wire" driver removes it.
In my case I was able to change my master driver's parameters so that it sets that "time to live" (ttl) parameter to 1 instead of the default value, and that forced the slave's removal the first time it didn't report present during a search.

Configuring IEEE 1588 PTPV2 with STM32 and ksz8463

I want to set up ptp (precision time protocol) now and HSR protocol in future. So I have a STM32H743ZIT6 and a KSZ8463FRL switch.
The switch has 3 port. According to datasheet port 1 and port 2 can be used as TC (Transparent Clock: P2P/E2E) and port 3 can be used as OC (Ordinary Clock: Master/Slave). I'm confused. Which port should connect to my mcu? Which port should be connect to GMC (Grand Master Clock)? My board is slave for another master now but can my board be used as Master too?
I connect port 3 to mcu and port 1 and 2 is free.
I haven't enough information. Please help me or introduce useful references. Thanks.
Ordinary Clock Ports are uplink facing so Port3 should be connected to GM. This this configuration, the MCU board is slave for GM and can be connected to port 1 or 2.
To use the board as Master, the MCU has to be connected to port 3(Port 3 always connects to Master). The CPU can sync to a GPS and act as GM this way.
The 1588v2 support on STM32H743 may be buggy... as per STM32 forums.

GPIO Zero Hx711 remote connection

I have 2 Raspberry Pi4, running as first one is master and the second one is slave. They are connected via ethernet cable.
A loadcell and HX711 have been wired to the slave
I would like to read the weight data from the master.
GPIO Zero library(https://gpiozero.readthedocs.io/en/stable/recipes_remote_gpio.html)
Has few examples Led, Button etc. as master and slave
I could not find an example for Hx711.
Does any one has experience with GPIO Zero library and Hx711 server, client solution.
Thanks

Can I configure EtherCAT slave as S/W?

I am looking at EtherCAT.
I am using embedded Linux.
etherlab and SOEM have been compiled to test that the EtherCAT master functionality is possible.
But I could not find anything about the EtherCAT slave(S/W).
First of all, etherlab had only master function.
SOES also required specific hardware(Lan9252, twrk60).(https://github.com/OpenEtherCATsociety/SOES/tree/master/soes/hal)
I think ethercat slave is also possible if ethercat master is available with ethernet port.
Is EtherCAT slave a physical hardware (device) unconditionally required, unlike the EtherCAT master?
EtherCAT Slave requires physical ESC(EtherCAT Slave Controller).

What is the effect of STARTUP IPI on Application Processor?

I am right now trying to understand the booting procedure and how does the processors initializes. I have read the Multiprocessor Specification section B.4.2 but it is not clear to me what INIT IPI and STARTUP IPI does to the BSP and AP.
In general; INIT IPI is like a soft reset for the (logical) CPU, that puts it into a "wait for SIPI state". The Intel manuals have a table showing the default values of various registers after power on, after reset, and after INIT IPI.
The Startup IPI is a way to tell the CPU to start executing at a certain address (an address derived from the "vector field" of the Startup IPI) before a usable IDT can be set up. This also bumps the CPU out of the "wait for SIPI state". Some (most) CPUs will respond to a Startup IPI when they aren't in the "wait for SIPI state", but without a previous INIT IPI you can't expect the CPU to be in a known/safe state at the time.
All CPUs respond to INIT IPI and Startup IPI the same. The main difference between BSP and AP is during power on (BSP executes firmware while AP CPUs wait).