can you synthesize RSICV rocket chip testharness module? - rocket-chip

After I setup the rocket-chip, it generated example top level Verilog. Can I synthesize the testharness.v module? I manually import the code into vivado, but got syntax error in SimDTM.v
(import "DPI-C" function int debug_tick)
vivado doesn't know what to do with DPI-C
Did I miss some package?

I'm a bit late, but you can't synthesize the testharness. It's used for testing in simulation only. DPI is a simulation-only construct.

Related

What is the difference between declaring a package and importing a package in a Modelica model?

I could declare a package or import a package in Modelica models, but I am not sure if there is any difference between them, I tried the following code, both of them work fine.
My question is :
Is there anything I should pay attention to when using these two methods?
partial model A
package SI1=Modelica.SIunits;
import SI2=Modelica.SIunits;
SI1.Voltage u1;
SI2.Voltage u2;
end A;
You are doing two fundamentally different things here, which both work for this case:
package SI1=Modelica.SIunits; is called a short class definition.
You create a new package named SI1, which inherits everything from Modelica.SIunits.
Short class definitions are basically the same as writing
package SI1
extends Modelica.SIunits;
end SI1;
See chapter 4.5.1 Short Class Definitions in the Modelica spec for details.
import SI2=Modelica.SIunits on the other hand simply influences where the Modelica tool looks for class definitions - so no new class is defined here. The chapter 13.2.1.1 Lookup of Imported Names explains that in the Modelica spec.
If you just want to use the package, import it. That's what import was designed for. Declaring a new package only makes sense if you want to add functionality or change anything (which is very limited though, if you are using the short class definition).
Only the import clause seems to trigger the lookup on a package that is not already loaded. Using for example the Modelica_LinearSystems2 library:
import: it checks, and Modelica_LinearSystems2 is loaded
partial model A
import ls2=Modelica_LinearSystems2;
end A;
package: it checks, but Modelica_LinearSystems2 is not loaded
partial model B
package ls=Modelica_LinearSystems2;
end B;
I guess that can break your models if not all of their dependencies are loaded when trying to simulate.
It is nevertheless interesting to see how Dymola (or even Modelica, since pedantic check doesn't throw any error) does not seem to care much about the use of package instead of import, when it comes to packages already loaded. I wasn't expecting the following model to work:
model C
package SI1=Modelica.SIunits;
SI1.Voltage u1;
parameter SI1.Current R=1;
equation
u1=2*R;
end C;
It turns out that even auto-completion (Ctrl+Space) works:

I can't understand _chipmunk_cffi.lib cp

When I trace to _chipmunk_cffi.py, it is from pymunk._chipmunk_cffi_abi import ffi, lib, lib_path.
So I trace to _chipmunk_cffi_abi.py and it's only lib, lib_path = load_library(ffi, "chipmunk", debug_lib=_lib_debug) but I can't find ffi anymore. So what is that?
I want to see what is doing in space.step(), where can I find this?
Pymunk is not doing the actual simulation itself, but is using a separate c library called Chipmunk for that part. Chipmunk is written in C, and called from the Python code in Pymunk with the CFFI foreign function interface library. I dont think you can trace it directly from the Python side into C-code. Instead if you want to see what it is looking like you can check the c-source directly, for example the step function is here: https://github.com/viblo/pymunk/blob/0d79176cf2fd642bd2ce4005478cb8d6e37c1e9c/chipmunk_src/src/cpSpaceStep.c#L336

How to set Environment Variables with SystemVerilog?

My current project sets an environment variable in a perl module and then later on makes a call from a SystemVerilog file to a function that uses that variable. The requirement is that whatever we added in the perl module is present in the environment variable on time of the call.
The problem however is that something between the perl module and systemverilog call meddles with my variable. I can't figure out what it is and fixing this issue is not pertinent to my project so I just want to set the variable to whatever the perl module sets it to and move on.
There's a handy getenv function in Perl and I am able to use getenv in SV as well. But there doesn't seem to be a setenv. What is the appropriate way to set an environment variable in SV?
Is the perl code invoked from within SystemVerilog using a $system() call? If so, environment changes made by the perl code will definitely NOT propagate back to the SV world, because those changes are made only in the $system() subprocess's environment.
The setenv() system call works for me via SystemVerilog DPI-C in all the tools I use (recent Fedora OS, recent versions of Mentor/Cadence/Synopsys simulators), but there may be some older *nix systems on which it's not available. I used the prototype as given in "man 3 setenv". Looking at discussions on other StackOverflow forums, it seems that using putenv() is not a great idea, especially from the DPI where you have no idea what will happen to the memory used for the DPI string argument. setenv() makes a copy of its argument strings, and should not be at risk from that problem.
It seems to me that if your tool flow isn't correctly propagating environment variables in the way you intend, then you have bigger problems than how to mess with the env from SystemVerilog. I specifically chose NOT to add environment-modifying functions to the svlib utility library, precisely because using the environment is a very bad way to communicate information within a SV simulation. I guess it would make sense if you need to set up an environment for some external program that you would then invoke using a SV $system() call.
Mh... Turns out the answer is trivial but this is the only thread to this question so I'll leave it up in case someone else finds themselve in a similar situation:
SystemVerilog does not have a setenv( ) or getenv( ) function. They're actually implemented from C using the following construct:
module/program foo();
import "DPI-C" function <return type> foonction(<function arguments>);
endmodule/program;
Apparently in my case someone had done this for getenv( ) but never setenv ( ). Reason I didn't catch it was because my code in question was included the following way:
**foo.sv**
if(var.bit) begin
call_function();
use_environment_variable();
end
**bar.sv**
module bar();
<do stuff>
`include foo.sv <-- foo code is copied in after calculations have occured.
endmodule
Trying to import DPI-C in foo.sv will trigger an error because the import will arrive after calculations have taken place. To solve this we need to import in bar.sv like so:
module bar();
import "DPI-C" function int setenv(string name, string value, int override);
<do stuff>
`include foo.sv
endmodule
Setting environment variables from SV is not very useful unless you are running another executable from SV.
If you want to get environment variables, you can use Verilab's svlib functions:
function automatic string sys_getEnv(string envVar);
function automatic bit sys_hasEnv(string envVar);

How to use Grand Central Dispatch in iOS in a .c file

I have some C code in an iOS project that I would like to optimize using GCD. Currently I can only get my code to compile if change my C file to an Objective-C file and import the Foundation framework. What do I have to include in my C file to get access to GCD?
I've tried:
#include <dispatch/dispatch.h>
but that doesn't seem to work it always complains about code blocks having the ^ character
You'll need to tell the compiler to enable Blocks with the -fblocks flag. You'll also need to use a compiler that understands blocks (Clang, for one).
You might need to;
#include <Block.h>
But it's not something I've done myself so could be wrong here.

Application constants used at compilation time

I have many constants in my application used by many classes of my project. These constants have to be set at compilation time (they are not modified later).
For now, I use #define statements at the top of each classe that requires the constant. The problem is that I have to repeat these statement in each classe which requires the constant.
I plan to define all these constants in my main.m or in another .h imported by main.m but I think it is not a good idea.
-> Is there a XCODE / IOS mechanic or file made for that purpose ?
-> If not, is it a good idea to define the constants in my main. ?
Thanks for you help
kheraud
You can write all constants in any .h file , then you can import that file in your projectname_Prefix.pch file .
then you don't need to import file in any other source file . its directly get imported .
you can save them in your *_Prefix.pch then they will apply for all classes without importing another class.
Generally the best way to handle shared constants is to declare them extern in one or more dedicated .h files, and then define them in corresponding implementation files. That way you'll be guaranteed to only have one copy of each constant in your binary, unlike with a #define.
You can provide target-wide compiler defines in Xcode by adding them to the Preprocessor Macros build setting. For example, this might let you create a free Lite version of your application by creating a target for it within your project, then adding a LITE define in the Preprocessor Macros.
See this question for more on this.