i am studying the virtual memory implementation and i got really confused about the sizes of the page tables and the page size , i searched the internet but i found only questions about page table size and not about the page size.
assume we have virtual memory size 32 bit each word .
and the size of each page is 4kb (this is given)
then in order to reach a specific byte in the page we need an offset of 12 bits ( 4kb = 2^12 bits).
also number of pages for each process is 2^20 = 1mb , which means we have 2^20 entries in the page table , and if we assume that each entry is 4 bytes , the the page table size is 4mb.
so my question is :
how many entries are in each page ?
because if i do the same calculations that i did in page table , then because of the 12 bits for the offset there are 2^12 entries in each page , and each entry is 4 bytes , then each page size is 4*2^12 so the page size is 16 kb ?
or is the number of entries is 2^10 , and each entry 4 bytes so the page size is 4kb , but then why is the offset 12 bits
i am genuinely confused ! i hope someone could explain what is correct
Related
Consider the following :
In a system, if virtual address = 32 bits, physical address = 24 bits, and the page size is 8KB.
Now we need to calculate the number of entries in the page table , my answer is as follows :
Here the page size is 8kB meaning that the offset is 13 ( 2^13=8K) , so now we have the logical address is 32 bits meaning that the page offset bits are 32-13=19, so therefore the page table will have 2^19 entries . Is that right ?
That would be 2^32 / 2^13 = 2^19 entries indeed.
What does this statement mean with respect to an operating system?
With a 2^32 address space and 4K ( 2^12 ) page sizes, this leave 2^20
entries in the page table. At 4 bytes per entry, this amounts to a 4
MB page table, which is too large to reasonably keep in contiguous
memory. ( And to swap in and out of memory with each process switch. )
Note that with 4K pages, this would take 1024 pages just to hold the
page table!
Please explain how they are calculating 1024 pages at the end? What is 4 bytes per entry in this regard? What is the meaning of 4K page size? Does 4K mean 4*1024 bytes? Are they considering 4 bytes (per word) OR does 4 bytes means it has 4*1024 words with each word having some size, say 4 bytes?
Please explain to me how they are calculating 1024 pages at the end?
Remember that we're dealing with powers of two, so
4 MB = 4,194,304 Bytes
4 KB = 4096 Bytes
4 MB / 4 KB = 4,194,304 Bytes / 4096 Bytes = 1024 Bytes
What is 4 Bytes per entry in this regard?
You need 32 bits to reference all 2^32 address spaces. With 8 bits per Byte, 32 bits = 4 Bytes.
For example the first address is 0 and the last address is 4294967295 or (2^32 - 1).
Entry | Page Memory Location
------------------------------------------
1 | 0
2 | 4096
3 | 8192
... | ...
2^20 | 4294963200 -> (2^32 - 1) - 4096
Each entry in the table points to 1 page somewhere out in memory. In this example lets say it starts at zero. There will be 2^20 entries and they will cover the entire span of memory addresses (2^32). Since each entry is 4096 Bytes you only need 2^20 entries to cover all of the pages.
4K means 4*1024 bytes?
Yes, it refers to each page being 4096 bytes (4*1024).
Are they considering 4 bytes (per word), OR 4 bytes means it has 4*1024 words which each word having some size say 4 bytes?
It can be smaller on 32 bit processors, but normally a word is 32 bits or 4 Bytes.
Additions Comments
When I say a page size is 4K, then it means it has 1024 entries with 4 bytes each or 1024*4 entries with 1 byte each or what else?
The page can hold anything, it's a container of data that is, in this example, 4096 Bytes. The page table holds entries that point to pages. As David stated, since the page table is stored in memory, it also is stored in pages.
Someone was saying that explanation is wrong. Correct one is: With a 2^32 address space and 4K (2^12) page sizes, this leave 2^20 pages in the table. At 4 bytes per entry, this amounts to a 4 GB page table, which is too large to reasonably keep in contiguous memory. (And to swap in and out of memory with each process switch.) Note that with 4K page sizes, this would take 1024 k pages (=1M pages) just to hold the total table! Is he correct or wrong?
He is incorrect. If the page table actually contained the data from each page then he would be correct. With 4096 byte pages and 2^20 entries, that would equal 4,294,967,296 bytes (4 GB), but the entries are only 4 bytes in size. So you multiple that with 2^20 entries to get 4,194,304 bytes (4 MB).
The documentation assumes these values:
2^32 = number of bytes in address space
2^12 = 4K = 4*1024 = number of bytes in one page
2^20 = 1M = 1024*1024 = number of pages
4 = number of bytes in the page table to describe one page
4M = 4*1024*1024 = total number of bytes in the page table
1024 = (4*1024*1024)/(4*1024) = number of pages in the page table
So 4 bytes is 4 bytes (the size of the entry in the page table for one page,
not the size of the page itself!).
Yes, 4K means 4*1024 bytes, not 4*1024 words.
All memory in use by the OS and any applications is stored in pages somewhere on the system.
Since the page table is something that has to be stored in memory, it also is stored in pages.
I found this example.
Consider a system with a 32-bit logical address space. If the page
size in such a system is 4 KB (2^12), then a page table may consist of
up to 1 million entries (2^32/2^12). Assuming that
each entry consists of 4 bytes, each process may need up to 4 MB of physical address space for the page table alone.
What is the meaning of each entry consists of 4 bytes and why each process may need up to 4 MB of physical address space for the page table?
A page table is a table of conversions from virtual to physical addresses that the OS uses to artificially increase the total amount of main memory available in a system.
Physical memory is the actual bits located at addresses in memory (DRAM), while virtual memory is where the OS "lies" to processes by telling them where it's at, in order to do things like allow for 2^64 bits of address space, despite the fact that 2^32 bits is the most RAM normally used. (2^32 bits is 4 gigabytes, so 2^64 is 16 gb.)
Most default page table sizes are 4096 kb for each process, but the number of page table entries can increase if the process needs more process space. Page table sizes can also initially be allocated smaller or larger amounts or memory, it's just that 4 kb is usually the best size for most processes.
Note that a page table is a table of page entries. Both can have different sizes, but page table sizes are most commonly 4096 kb or 4 mb and page table size is increased by adding more entries.
As for why a PTE(page table entry) is 4 bytes:
Several answers say it's because the address space is 32 bits and the PTE needs 32 bits to hold the address.
But a PTE doesn't contain the complete address of a byte, only the physical page number. The rest of the bits contain flags or are left unused. It need not be 4 bytes exactly.
1) Because 4 bytes (32 bits) is exactly the right amount of space to hold any address in a 32-bit address space.
2) Because 1 million entries of 4 bytes each makes 4MB.
Your first doubt is in the line, "Each entry in the Page Table Entry, also called PTE, consists of 4 bytes". To understand this, first let's discuss what does page table contain?", Answer will be PTEs. So,this 4 bytes is the size of each PTE which consist of virtual address, offset,( And maybe 1-2 other fields if are required/desired)
So, now you know what page table contains, you can easily calculate the memory space it will take, that is: Total no. of PTEs times the size of a PTE.
Which will be: 1m * 4 bytes= 4MB
Hope this clears your doubt. :)
The page table entry is the number number of bits required to get any frame number . for example if you have a physical memory with 2^32 frames , then you would need 32 bits to represent it. These 32 bits are stored in the page table in 4 bytes(32/8) .
Now, since the number of pages are 1 million i.e. so the total size of the page table =
page table entry*number of pages
=4b*1million
=4mb.
hence, 4mb would be required to store store the table in the main memory(physical memory).
So, the entry refers to page table entry (PTE). The data stored in each entry is the physical memory address (PFN). The underlying assumption here is the physical memory also uses a 32-bit address space. Therefore, PTE will be at least 4 bytes (4 * 8 = 32 bits).
In a 32-bit system with memory page size of 4KB (2^2 * 2^10 B), the maximum number of pages a process could have will be 2^(32-12) = 1M. Each process thinks it has access to all physical memory. In order to translate all 1M virtual memory addresses to physical memory addresses, a process may need to store 1 M PTEs, that is 4MB.
Honestly a bit new to this myself, but to keep things short it looks like 4MB comes from the fact that there are 1 million entries (each PTE stores a physical page number, assuming it exists); therefore, 1 million PTE's, which is 2^20 = 1MB. 1MB * 4 Bytes = 4MB, so each process will require that for their page tables.
size of a page table entry depends upon the number of frames in the physical memory, since this text is from "OPERATING SYSTEM CONCEPTS by GALVIN" it is assumed here that number of pages and frames are same, so assuming the same, we find the number of pages/frames which comes out to be 2^20, since page table only stores the frame number of the respective page, so each page table entry has to be of atleast 20 bits to map 2^20 frame numbers with pages, here 4 byte is taken i.e 32 bits, because they are using the upper limit, since page table not only stores the frame numbers, but it also stores additional bits for protection and security, for eg. valid and invalid bit is also stored in the page table, so to map pages with frames we need only 20 bits, the rest are extra bits to store protection and security information.
A processor uses 36 bit physical addresses and 32 bit virtual addresses with a page frame size of 4 KBytes. Each page table entry size is of 4 bytes. A three level page table is used for virtual to physical address translation, where the virtual address is used as follows :
bits 30 - 31 are used to index into the first level page table
bits 21 - 29 are used to index into the second level page table
bits 12 - 20 are used to index into the third level page table
bits 0 - 11 are used as offset within the page
The number of bits required for addressing the next level page table ( or page frame ) in the page table entry of the first , second and third level page tables are respectively ?
This was a question asked in GATE 2008.
My Analysis: The maximum number of page frames = (physical address size) / ( page size ) = 2^36 / 2^12 = 2^24.
Thus, 24 bits will be enough to index the page numbers in the 3rd level page table. Now we have to find out how many page tables will be there in the 3rd level. Its given that 9 bits are used to index into the 3rd level page tables. So there are 2^9 page tables in level 3. That means 2^32 virtual space is contained in 2^9 page tables so entries per page table= 2^32/2^9 = 2^23. So 23 bits are required in an l2 page table entry to index the entries of a particular page table in 3rd level page table. 2^9 page tables are there in L2 from L1 page table we need to get to any one of these 2^9 page tables. So 9 bits are required in L1.
This analysis somehow doesn't seem right. I am very much confused. Can someone please explain the concepts ?
At first we have physical address of 2^36, and page size is 2^12. Hence 2^24 should be the number of pages. and you figured that right.
Since given 9 bits for 3rd level page table, ie 2^9 and then 4 bytes per entry, so 2^11. Now 2^36/2^11 would give 2^25. Hence 25 bits (25 bits at second level table).
Now again given 9 bits for second level page table. so the same logic applies again
2^36/2^11, which again is 2^25.(25 bits at first level table).
hence the answer must be
25,25,24
One thing that you have to understand is, that though virtual address space is 2^32, we need to map the entire 2^36 entries and not 2^32.Also, each page can take care of 2^9 * 2^2, and you didn't consider this 2^2 as well. The same thing holds at the higher level as well
You should have a look at this question
and this wikipedia entry, especially the figure.
In this question, there are 36 bits of physical memory, out of which 12 bits are designated for the offset. The offset is not going to change in any level (since it is the size of the page). Therefore in any level there will be 24 frame bits required for the page table. Since there are 36 bits of physical memory, you cannot increase the physical memory size by increasing the number of bits in the page table.
I would like to know how to calculate the size of the page table (in bytes) if there is one entry per page, each entry requires 4 bytes and my page size is 64KB.
Size of PageTable (bytes) = Number of Entries in PageTable * Size of Entry
Number of Entries in PageTable = Size of Memory / PageSize
Size of Entry = 4 Bytes in this case.
Plug and Chug.
Since you didn't clearly specify what you mean with KB you could mean either a kilobyte (kB), that is 1000 bytes, and kibibyte (KiB). that is 1024 bytes.
Pagetable size in bytes can be calculated through multiplication.
Number-of-pages * page-table-entry-size should give the answer. The page table just contains addresses of pages; page size is irrelevant.
So if you have 1000 pages then the page table size is 4*1000, if you have 1000000 pages then its 4*1000000.
I think it is not so simple, doesn't have each page table entry something like valid, reference, or dirty bits, if all 3 are included the table for 1000 pages would have to have size like 1000x(4x8+3) in bits. Let me know if I am correct because this is my homework also ;-).
Size of page table =no. of page table entry*size of one entry .
No of page table entry =logical address space /size of one page