Device Tree Bindings For mipi-dsi - Allwinner R16 to DLPC3433 - linux-device-driver

Question

I have a custom board that is supposed to use a MIPI-DSI video signal from the allwinner R16, that is supposed to be received by the TI DLPC3433.
[R16] >>>>>>> MIPI-DSI >>>>>>>> [DLPC3433]
Here are the datasheets:
https://www.ti.com/lit/ds/symlink/dlpc3433.pdf?ts=1601313127857&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FDLPC3433
https://linux-sunxi.org/images/b/b3/R16_Datasheet_V1.4_%281%29.pdf
I want to properly configure the device tree. So far, I don't have a perfect indication that any video signal is being produced. What do I need to put in my device tree configuration to make it work? I am having trouble knowing exactly with documentation and examples. Where do I need to define the properties of the DLPC3433? And how would I define the properties for the DLPC3433?
Please see parts of the device tree below:
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
clock-frequency = <100000>; /* i2c bus frequency 100 KHz */
status = "okay";
dsi_hdmi_bridge#4d {
compatible = "ite,it6263";
reg = <0x4d>;
reset-gpios = <&pio 4 9 GPIO_ACTIVE_LOW>; /* PE9 */
port {
it6263_in_dsi: endpoint {
clock-lanes = <4>;
data-lanes = <0 1 2 3>;
remote-endpoint = <&dsi_out_it6263>;
};
};
};
};
...
&tcon0 {
// compatible = "allwinner,sun8i-a33-tcon";
status = "okay";
};
&dsi {
// compatible = "allwinner,sun6i-a31-mipi-dsi";
status = "okay";
ports {
port#1 {
reg = <1>;
dsi_out_it6263: endpoint {
remote-endpoint = <&it6263_in_dsi>;
};
};
};
};
&dphy {
// compatible = "allwinner,sun6i-a31-mipi-dphy";
status = "okay";
};
And here is what that device tree includes from the sun8i-a33.dtsi
dsi: dsi#1ca0000 {
compatible = "allwinner,sun6i-a31-mipi-dsi";
reg = <0x01ca0000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_MIPI_DSI>,
<&ccu CLK_DSI_SCLK>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_MIPI_DSI>;
phys = <&dphy>;
phy-names = "dphy";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port#0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
dsi_in_tcon0: endpoint {
remote-endpoint = <&tcon0_out_dsi>;
};
};
};
};
dphy: d-phy#1ca1000 {
compatible = "allwinner,sun6i-a31-mipi-dphy";
reg = <0x01ca1000 0x1000>;
clocks = <&ccu CLK_BUS_MIPI_DSI>,
<&ccu CLK_DSI_DPHY>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_MIPI_DSI>;
status = "disabled";
#phy-cells = <0>;
};
fe0: display-frontend#1e00000 {
compatible = "allwinner,sun8i-a33-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>,
<&ccu CLK_DRAM_DE_FE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_BUS_DE_FE>;
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port#1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint#0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
};
};
};
be0: display-backend#1e60000 {
compatible = "allwinner,sun8i-a33-display-backend";
reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
reg-names = "be", "sat";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
clock-names = "ahb", "mod",
"ram", "sat";
resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
reset-names = "be", "sat";
assigned-clocks = <&ccu CLK_DE_BE>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be0_in: port#0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint#0 {
reg = <0>;
remote-endpoint = <&fe0_out_be0>;
};
};
be0_out: port#1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_drc0: endpoint#0 {
reg = <0>;
remote-endpoint = <&drc0_in_be0>;
};
};
};
};