First of all: I'm using the CubeIDE toolchain offered by STM.
Some of the STM32 microcontrollers have multiple ADCs (for example STM32F446xx) and offer a multi-regular-simultanuous mode (DualMode or even TripleMode), where the ADC1 is set as a master and triggers the other ADCs, which are in slave configuration.
When I use this configuration in the CubeIDE I can still set the trigger for the ADC1 to a timer, and not use it in continuous mode. Does this configuration make any sense? I could also just set the trigger for all the ADCs I want to be synchronized on the same timer, no?
So the way I understand it, multimode only makes sense, when I want to have it running in continuous conversion mode and have all the ADCs be synchronized.
Related
I'm having trouble with i2c communication. In my i2c bus, i have 4 boards (STM32L4 Sensortiles) and sometimes one of them blocks the bus and the others stop communicating consequently. When I reset that one that blocks the bus, all boards starting working again.
In my debugs, this bug happened when HAL_I2C_GetState(&hi2c3) returns HAL_I2C_STATE_BUSY_RX, even my others i2c functions HAL_I2C_Slave_Receive_IT and HAL_I2C_Slave_Transmit_IT returns HAL_OK:
Any ideas what Im doing wrong? Thanks.
Using libraries like HAL leads to problems like this one. Why?
HAL users feel free from knowing your hardware as magic library will do everything for you.
HAL users usually do not know how the peripheral works and how to debug it.
HAL users do not bother to go through the magic HAL function to see what the problem is.
Posting some images form debugger will not help.
What you need to do:
Get even the cheapest logic analyzer (there are $10 on ebay) and record the communication. See if the slave keeps the clock or data line low. If yes toggle the clock pin 9 times to unblock the line
If nothing helps reset the I2C peripheral using RCC register (it has to be implemented on all connected boards).
I encountered the following issue while using Keil MDK 5 for STM32H743.
I had a communication problem with my SPI code and after a while I found out that it was due to the Periodic Windows Update.
When it is activated, it seems that the debugger is reading regularly the SPI data register, which reads the FIFO (so changes the state of the FIFO). Consequently when the software reads the FIFO, some bytes have been "lost" (or consumed by the debugger).
Is it an expected behaviour ? Do you know if it is due to Keil or to the STM32 ?
I don't fully understand how an access from the debugger to a register is working: I guess there is a read command sent over SWD but then, internally does the access to memory go through AHB / APB like for code executing on the CPU ?
Any registers that modify behaviour by being read (such as clearing status bits) can be problematic when debugging and the registers are shown in the debug window.
The best bet is to only look at the registers when you stop (close the DR window for the peripheral), and always be aware that you may clear status bits etc.
It is the way the processor works and nothing to do with the debugger.
It is a very common debug issue with serial comms etc.
if you have DR display in your watch window (or any other similar windows on the debugger screen) and you step through the code every time you step (or generally break) the data is read.
That is the only possible reason.
Is it possible to enable readout protection on STM32 discovery board?
First I've tried STM32F429I-DISC1 but after enabling RDP with "stm32f4x lock 0" command (I'm using Linux/OpenOCD) MCU doesn't seem to work until sending unlock command (and writing new firmware).
Then I found following statement in this board documentation: 'Known limitation:
• Activating the readout protection on the ST-LINK/V2-B target, prevents the target application from running afterwards. The target readout protection must be kept disabled on the ST-LINK/V2-B boards.'
After that I've tried TM32L100CDISCOVERY - its documentation doesn't have such limitation note, and also its ST-LINK/V2 board, not ST-LINK/V2-B. But I've got exactly same behaviour - everything works fine - LEDs blinking as I programmed, but after locking (with 'stm32lx lock 0' command and subseqyent power cycle) - target MCU doesn't do anything.
So, it looks like no one discovery board support RDP protection at all and if I want to play with this feature - I anyway need to make a custom device? Or its possible with stock demo board but I did something wrong?
The full commands sequence to lock looks so:
init
reset halt
stm32lx lock 0
reset halt
exit
.. or stm32F4x instead of stm32lx for STM32F429I board
I've would like to check whether STM32 Workbench works properly or not.
So, I've created new project for my F7 Discovery. I am using the HAL library and also enabled FreeRTOS. As FreeRTOS needs an independent timer, I enabled TIM1 for HAL and SysTick works for FreeRTOS.
Unfortunately, while debugging the project in Workbench, the program each time ends in the TIM1 interrupt routine, again and again, but I did NOT set any breakpoints here. How can I debug my code if everything I can see during debugging is TIM1 ISR?
As I understand it this is a feature of the r0p1 M7 core. ST only licensed the r0p1 core. Unsure if newer versions or model of the chip will be any better.
I read on another forum that this could perhaps mitigate the problem:
(DBGMCU)->APB1FZ = 0x7E01BFF;
(DBGMCU)->APB2FZ = 0x70003;
I am working on a project using STM32F103 and I have finished development of the firmware. I use ST-Link Utility for downloading stuff to the microcontroller. When I activate read out protection on my chip, it stops working. And I need to protect my firmware. What is the problem?
Just a bit more info to the accepted answer:
From ST32F10XXX docs, section "2.4.1 Read protection":
The read protection is activated by setting the RDP option byte and
then, by applying a system reset to reload the new RDP option byte.
Note: If the read protection is set while the debugger is still
connected through JTAG/SWD, apply a POR (power-on reset) instead of a
system reset (without debugger connection).
Once the protection byte
has been programmed:
Main Flash memory read access is not allowed
except for the user code (when booting from main Flash memory itself
with the debug mode not active).
Pages 0-3 (for low- and
medium-density devices), or pages 0-1 (for high-density and
connectivity line devices) are automatically write-protected. The rest
of the memory can be programmed by the code executed from the main
Flash memory (for IAP, constant storage, etc.), but it is protected
against write/erase (but not against mass erase) in debug mode or when
booting from the embedded SRAM.
All features linked to loading code into and executing code from the embedded SRAM
are still active (JTAG/SWD and boot from embedded SRAM) and this can be used to
disable the read protection. When the read protection option byte is altered to a
memory-unprotect value, a mass erase is performed.
When booting from the embedded SRAM, Flash memory accesses through the code
and through data read using DMA1 and DMA2 are not allowed.
Flash memory access through data read using JTAG, SWV (serial wire viewer), SWD
(serial wire debug), ETM and boundary scan are not allowed
Unprotection
To disable the read protection from the embedded SRAM:
Erase the entire option byte area. As a result, the read protection code (RDP) will be
0xFF. At this stage the read protection is still enabled.
Program the correct RDP code 0x00A5 to unprotect the memory. This operation first
forces a Mass Erase of the main Flash memory.
Reset the device (POR Reset) to reload the option bytes (and the new RDP code) and,
to disable the read protection.
Note: The read protection can be disabled using the boot loader (in this case only a System Reset
is necessary to reload the option bytes). For more details refer to AN2606.
There's also a write protection on the chip, see the doc.
ADDED: STM32 readout protection has problems: https://blog.zapb.de/stm32f1-exceptional-failure/ so be aware.
You have to unlock the flash first. There should be a call in the STM32 StdPeriph library. My code looks something like this:
/* Read protect the flash. NEVER EVER set this to level 2. You can't
* write to the chip ever again after that. */
FLASH_OB_Unlock();
FLASH_OB_RDPConfig( OB_RDP_Level_1 );
if (FLASH_OB_Launch() != FLASH_COMPLETE)
{
err_printf("Error enabling RDP\n");
}
FLASH_OB_Lock();