I'm using PySerial to communicate to some devices over RS485 multi-drop. I am bit-banging the DE signal to enable transmission before sending a packet and releasing it at the end.
The problem is that the time for release varies, especially under processor load, and the responses from the devices get clobbered (and aren't received).
I know PySerial has RS485 support, but from everything I've read about my embedded SBC (NXP iMX6 Dual), the RTS signal is not available on the GPIO connector. I just have arbitrary GPIO to use.
Is there a way to map an arbitrary GPIO signal to the RTS functionality so that the Linux tty drivers will assert/deassert my desired GPIO pin?
The following statement gives me some hope (https://www.kernel.org/doc/html/v4.17/driver-api/gpio/drivers-on-gpio.html)
"""
... there are special GPIO drivers in subsystems like ... the TTY serial subsystem to emulate MCTRL (modem control) signals CTS/RTS by using two GPIO lines.
"""
There seems to be some kind of support for in the tty driver for /dev/ttyimxN devices.
https://github.com/torvalds/linux/blob/v4.14/drivers/tty/serial/serial_mctrl_gpio.h
https://github.com/torvalds/linux/blob/v4.14/drivers/tty/serial/imx.c
unsigned int have_rtsgpio:1;
But how can I set this up with PySerial?
How can I specify the GPIO port to use (if at all)?
Thanks for any help !!
EDIT
I've found info in the kernel sources that match the kernel on my board. This describes how to specify the gpio for modem control emulation (software control, instead of hardware control).
https://github.com/ADVANTECH-Corp/linux-imx/blob/adv_4.14.98_2.0.0_ga/Documentation/devicetree/bindings/serial/serial.txt
So it seems possible by changing the device tree sources and making a new device tree blob for my system.
This should all be independent of pyserial.
I'm not sure if this can be set/overridden at runtime with an ioctl, which would be handy (instead of having to muck around with kernel sources and building device tree blobs, etc).
Related
I am trying to use the rpi pico as a I2C slave capable of receiving and sending multiples bytes using interrupts.
Using the rpi pico as a I2C slave/memory with micropython is possible. (https://forums.raspberrypi.com/viewtopic.php?t=302978).
I am now trying to implement reading from the pico using interrupt.
According to the pico documentation, when the master tries to read data from the pico, the RD_REQ is set to 1. Then the pico hold the scl to 1 until and IRQ handler write data in the IC_DATA_CMD register and disable the interrupt. (https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#page=481)
In the documentation the interrupts sources are defined as I2C0_IRQ or I2C1_IRQ (https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#page=60)
So far, I only found how to create interrupt handle linked to specific pin. I do not understand how to link the callback function to the interrupt source or the RD_REQ bit.
describe how a JTAG connection is used to test the circuitry in a chip using just 5 pins
JTAG is used as a synonyme for the boundary scan protocol, see
- https://en.wikipedia.org/wiki/JTAG#Boundary_scan_testing
- https://en.wikipedia.org/wiki/Boundary_scan
It was the Joint Test Action Group (JTAG) who originally devised this protocol for testing circuitry around chips.
Besides this original purpose, the same protocol is used to program and debug CPUs, FPGAs etc.
In order to use JTAG, you need an adapter device that supports the circuitry you would like to test/debug.
[...] using just 5 pins
You are wondering how to test the entire chip through "just" 5 pins? To get a rough idea, think of a shift register similar to UART and SPI (but keep in mind that JTAG is notably more sophisticated).
I tried to find an answer to this question by searching SDIO which is related to my question based on Silicon Labs naming of data channels. However, I was flooded with topics related to the SDIO protocol for serial comms with an SD memory card - a totally different concern.
I want to interface a PIC MCU (SPI bus) with Silicon Labs FM TX/RX 47XX chips which describe a serial control interface and the multiple ways to use it - what they call 2-wire (basically I2C) or what they call 3-wire and refer to as "SPI". The 3 lines are SLCK, SEN and SDIO (clock, enable, and data input/output half-duplex over the same wire).
My problem is that SPI is full duplex capable - TX and RX simultaneously. Even though every implementation I've seen of this is really half-duplex - send then receive - the hardware is wired with SDI/SDO or MISO/MOSI or called whatever lines in the SPI module; a separate data IN and a data OUT wire. Along with SCLK and SEN (clock and enable).
I'm not sure how to wire this up - and whether it will work. Do I wire both the SDI and SDO pins of the PIC (SPI module) to the same SDIO on the Si47XX? Since the Si47XX is half-duplex that would make sense; but I've never seen the two lines tied on an SPI interface. Not sure if the pins are always Hi-Z for example and I don't want to fry something out. Would I need to add pull ups/downs?
Oddly, I can't seem to find an actual wiring diagram of such a case. When I search 3-wire SPI I always get examples where SEN is tied since only one slave device is being used - not my situation. Any advice would be - as always - greatly appreciated.
-Rick
One can interconnect SPI and 3-wire devices using the following schematic. It does not matter which device is master and which is slave.
SPI device 3-wire device
----+
SDO |--/\/\/\-+ 3k
| | +---
SDI |---------*--------| SDIO
| |
SCK |------------------| SCK
SEN |------------------| SEN
----+ +---
If a 3-wire device is in reception state, then SDO signal comes via resistor to (Hi-Z) SDIO pin and back to SDI pin.
If the 3-wire device is in transmission state, then SDIO output overrides SDO value.
The example of such connection one can see in FTDI datasheet for FT2232H, page 37 (Figure 4.1RS232 Configuration) — 93С46 to FT2232H connection.
At lower SPI frequencies one can use higher resistor value for lower overriding current. It's depend also from traces length but in usual cases 3k is in very good marging for frequences up to 2 MHz.
p.s. It seems that the question is not about programming. Could it be moved to electronics.stackexchange.com?
I'm using an Atmel SAM3S MCU, and their ASF stuff can do I2C (they call it TWI) communications. That's fine, except it's taking too much time from my main loop.
So, I'd like to be able to spark off a DMA transfer to read the data from the I2C device. However, all the docs say you can't turn on TX and RX simultaneously on a half-duplex device like TWI. The docs do show that it has a Peripheral DMA Controller (PDC) register section in the TWI registers, but I can't find any PDC examples, except for the USART, which is full duplex.
The only thing I can think of to try is to set TX section, and the next-RX section, and hope that it automatically enables RX after the TX is done.
Has anyone out there used DMA for an I2C read on the SAM3S? If so, could you point me to some docs or examples?
I'm not familiar with the particular part, however I would suggest that for many common usage patterns your best bet would probably be to only use DMA to handle multi-byte sequences of data. Most I2C peripherals allow data to be read out by performing a start with a "write" address byte, and, if that is acknowledged, sending out an address or other information about what data is desired. This is followed by a restart and a "read" address byte. If that is acknowledged, one may then perform all but one of the byte reads with the "ack" flag set. When that is finished, ask for the final byte to be read with the "ack" flag clear.
I'm not sure whether it would be worthwhile to use the DMA controller to clock out the bytes of the requested address, but probably not worthwhile to try to use it to clock out the first byte of the read command.
I am trying to send/retreieve data from/to FPGA using Matlab. I connected FPGA using Virtual com port. Now how to send data from Matlab to FPGA or read data of FPGA ?
FTDI 2232H is on the FPGA as well. I connected external LED's and switches on the I/O ports of the FPGA.
I am new in this field, so want some guideline to start communication b/w MAtlab and FPGA:
I tried following code:
s1= serial('COM9')
fopen(s1)
. Is it the right way to communicate ? Kindly guide. thanks
FPGA's are configured using a Hardware Description Language (HDL) such as Verilog or VHDL. These languages let you specify how the switch configuration within the FPGA, which in turn lets you construct your custom digital logic and processing system.
The HDL Coder Toolbox in Matlab lets you design and prototype your custom logic using higher-level functions, which are then translated into HDL and can be be used to directly program your chip. This tutorial describes the process in detail.
If you already have a design implemented on your FPGA and want to communicate with that implementation, you would use Matlab's serial port communication functions. The exact protocol will depend on the interface you have implemented.
Some intermediate debugging steps I find helpful:
Verify that you can send serial port data from your computer. In Windows XP, you can do this easily with HyperTerminal, and hooking up a scope to the output pins of your serial cable. Set up a trigger to capture the event. For Windows 7 and newer, you'll need to download a HyperTerminal client.
Repeat this same process with Matlab. Using a scope, verify that you see the serial port signal when sent from Matlab, and that the output matches the results from step 1. Again, set up a scope trigger to capture the event.
Now connect the serial cable directly to the FPGA board. Modify your HDL to include a latch on the serial input that displays the output on the LED's. Verify that your board initializes to the correct LED state, and that the LED state changes when you send the serial message.
Lastly, verify that you are interpreting the message correctly on the FPGA side. This includes making sure that the bit-ordering is correct, etc. Again, the LED outputs can be very helpful for this part.
The key here is to take small, incremental steps, physically verifying that things are working each step of the way.