CAN updater with Raspberry for NXP microcontroller (MKE06Z64VLH4) - raspberry-pi

we have system which runs on NXP KE06 chip (MKE06Z64VLH4). It's stationary system, which was developed from primary company, which is not interested in quick bug fixing (there is a lot of bugs) and further development.
Now we have a job to solve a problem, without primary company. We have right now 200 products all over the country. If we want to update mentioned NXP chip, we need to travel to destination, take machine apart,
make and update for NXP chip over SWD (.HEX file) manualy and assemble each machine together again.
We have our controlling system on Raspberry, which is running Raspbian and we have RS-485 half-duplex connection between Raspberry and NXP chip. (which connection continues to CAN --> NXP chip)
We want to solve this problem with software and with current hardware. (With changing all current hardware, with new hardware solution, solves the problem)
Question:
Is possible to make an "remote" updater/flasher with .HEX file, and with current hardware?
FACTS: - we can't ask company for source code
- we have current .HEX file
- we don't want to replace all hardware (200+ pieces)
- we don't know the source code

Is possible to make an "remote" updater/flasher with .HEX file, and with current hardware?
No, because for that to be an option, the MCU must already have a bootloader alternative inside itself.
NXP hates their customers, so they block anyone from reading the manual without logging in... I managed to eventually get it. There is no mentioning of on-chip bootloader support save for SWD. The part can only be programmed by SWD or by a custom bootloader that you'd have to develop.
UART-based bootloaders are not uncommon - you could write one yourself using either UART/RS-485 or CAN, but then you'd have to update the firmware to download the bootloader, so it isn't helpful in this case.
Summary: you need something with SWD on-site or it can't be done.
Also please note that these MCUs typically have anti-copycat protection enabled, preventing you from reading anything out of it. Depending on how they were programmed, this could be present and then the only thing you can do is to erase and flash the whole program.

Related

Re-program STM32F102 trouble

I am trying to make some custom firmware for a MIDI controller (AKAI LPD8).
There is an STM32F102R8T6 chip in the unit.
I am trying to reach it with a programmer to wipe it, but it seems to not be responsive.
Some information and thing I have tried:
The firmware that came with the unit works, so the chip is not broken
Removed the components connected to the programming pins (PA9-PA10 and PA13-PA14)
I am able to pull BOOT0 high and have it not run the main program, but I am however not able to get a life sign using either an ST-Link2(clone) connected to PA13/14, nor a USB to serial adapter connected to PA9/PA10, so I am not sure what mode it is in
The connection has been checked, and RX-TX etc is the correct way around (but also for the sake of trying it all, I reversed the connections as well...).
Tried both the STM32CubeProgrammer and stm32flash, but none connects.
I am actually not sure if AKAI have locked the chip in such a way that you cannot even do a full chip erase and use the chip for something new? The NRST pin is strangely not doing anything to the running of the firmware either when I try to pull it low.
Is there a way to reprogram these chips when they come off of a commercial product, or are they permanently locked?
Any solution/tips?
Many of the STM32 parts have "proprietary code read-out protection" (google PCROP) which but you might be lucky and they haven't enabled it in the option bytes. Read the documentation for that and the bootloader documentation and get a good idea of what you expect it to do if it is enabled and if it isn't.
If you have a scope, try watching the SWD/JTAG pins to see if there is any response from the device. (If you aren't even sure if it is in reset then scope the crystal if there is one).
If you haven't got a scope, you might be able to to verify what it is doing by seeing if it sets the pins and pull-resistors to how they would be expected to be in the bootloader mode, eg: UART TX should be high if it is enabled, even it it isn't transmitting anything. Put a strong pull-down (~1k) on there and see if it still reads high.
After hours of trying different ways of making it work (also tried the alternate mapping of the UART port), and probed the TX pin as suggested by Tom V to no avail, I have given up working on that specific chip and ordered an upgrade from the STM32F4 family instead to replace it with. A lot more power and useful peripherals.
A bit of a non-answer to the specific question. Frustrating to not have found out what was wrong (chip or approach) but being mindful of the sunk cost fallacy, I think it was best to just replace the chip with a fresh one and start development from there.

Dump the firmware from an STM8 microcontroller

I have a 600W digital step up converter with broken STM8S103K3T6C and another that is currently working OK. Is there a way to copy (dump) firmware from the working one and upload it to the new chip. Since I have only one working, I have to be extra careful not to damage the working controller. I do have some basic experience with STM32, but I am grateful for any help I could get. I have a copy of ST-Link v2 programmer. Apparently (if there is a way), it has to be done via SWIM (which I don't nothing about, started reading few days ago). Not sure what is the proper way to start. Converter itself has UART pins at the right side of the board.
Thanks in advance.
if the chip is not locked, yes it's possible using SWIM interface. use STVP tool to extract firmware from the old one or to program it to the new one. it is bundled in a package called "ST toolset" for STM8 and downloadable from ST website. the SWIM needs 1 pin (plus reset if target uses that pin). despite that the STM8s hvae 3~5V supply, it's better to use 3.3V supply for it for the sake of the other circuitry. you can extract it even when the device is on, so there's no need to connect a supply pin from programmer to it.

Why are interrupts disabled by the boot loader?

I am taking a course in Operating Systems. I am booting jos os on to qemu x86 PC emulator. I read that BIOS finds bootable devices and loads the bootloader from the first sector of the bootable device to 0x7c00 in the memory.
The first instruction in the bootloader is to disable the interrupts i.e cli.
I read about cli i.e it clears the enable interrupts flag in the eflags register. I read from Wikipedia that it is done to avoid a race condition between kernel code and interrupt handlers. please explain what a race condition is and what sort of race condition is present here.
I still don't understand why it's done? Can someone elaborate on this?
I am considering using JOS for my operating systems class, perhaps as early as Winter term 2016. The cli question, while interesting because of what it prevents, is a little less interesting, IMO, than this one:
When are interrupts enabled again?
One can use the directions on loading the git for the lab described at http://pdos.csail.mit.edu/6.828/2014/labs/lab1/ and then look through the boot and kern directories for the sequence.

Can an NXT brick really be programmed with Enchanting and adaption of Scratch?

I want my students to use Enchanting a derivative of Scratch to program Mindstorm NXT robots to drive a pre-programmed course, follow a line and avoid obstacles. (Two state, five state and proportional line following.) Is Enchanting developed enough for middle school students to program these behaviors?
I'm the lead developer on Enchanting, and the answer is: Yes, definitely.
The video demoing Enchanting 0.0.4 shows how to make a proportional line follower (and you could extend it to use a PID controller, if you wish). If you download the latest version, 0.2.2, it includes a sample showing a two-state line follower (and you can see a video and download code here). You, or with some instruction / playing around, a middle-schooler, can readily create a program to do n-states, and, especially if you follow a behaviour-oriented approach, you can avoid obstacles at the same time.
As far as I know, yes and no.
What Scratch does with its sensor board, Lego Wedo, and the S4A - Scratch for Arduino - version as well as, I believe, with NXT is basically use its remote sensor protocol - it exchanges messages on TCP port 42001.
A client written to interface that port with an external system allows communication of messages and sensor data. Scratch can pick up sensor state and pass info to actuators, every 75ms according to the S4A discussion.
But that isn't the same as programming the controller - we control the system remotely, which is already very nice, but we're not downloading a program in the controller (the NXT brick) that your robot can use to act independently when it is disconnected.
Have you looked into 12blocks? http://12blocks.com/ I have been using it for Propeller and it's great and it has the NXT option (I have not tested)
It's an old post, but I'll answer anyway.
Enchanting looks interesting, and seems to be still an active project.
I would actually take the original Scratch (1.4), as it's is more familiar and reliable.
It's easy to interface hardware with Scratch using the remote sensor protocol. I use a simple serial interface (over a USB-adapter) which provides 3 digital inputs and 3 digital outputs. With that, it's possible to implement projects such as traffic lite, light/water/heat-sensors, using only lets, resistors, reed-contacts, photo-transistors, switches, PTSs.
The costs are < 5$
For some motor-based projects like factory belts, elevator, etc. There is not much more required, a battery and a couple of transistors/relais/motor driver.

How do I configure an ATA hard disk to start generating interrupts?

RESOLVED
After much confusion and frustration, I finally got my hard disk to interrupt. :D It basically came down to the fact that I kept reading the status register instead of the alternate status register. A few other things were messed up to boot, but the point is my hard disk driver is finally starting to take shape. Now, for others I will leave the original post.
P.S. For further clarification, I didn't need to issue any sort of reset command. All I did was the following:
Select the device (didn't want to kill the Solaris OS on the other disk)
clear the nIEN bit in the DEVICE CONTROL register
issue an IDENTIFY DEVICE command***
Actually, I am not sure if the IDENTIFY DEVICE command is need because I left the lab happy before I could test the code without issuing the command. However, the main point is that I needed to be sure to read the alternate status register and have the nIEN bit cleared without the need for a reset. The BIOS apparently takes care of most stuff.
I am currently trying to write a disk driver for a hobby OS being developed at my school. I currently have routines to read/write data in the PCI configuration space and assembly routines to do port IO with the various registers defined by ATA/ATAPI-7. Now, my question is, specifically how will I get an IDE hard drive to start generating interrupts? I have been looking through all this documentation and is hasn't become clear to me what I am doing wrong.
Can someone explain exactly what causes an IDE hard drive to start generating interrupts? I already have an interrupts service routine ready to test, but am having difficulty getting the interrupts in the first place. Can this be accomplished through the ATA SOFT RESET?
Thanks!
UPDATE: Ok, I was able to get the secondary channel, an ATAPI CDROM to generate interrupts by setting the SRST bit in the DEVICE CONTROL register for a soft reset. This does not work for the hard disk on the primary channel. What I have noticed so far is that when I set the SRST bit for the HDD, it sets the BSY bit and leaves it set. From there I don't know what to do.
This reference should help you a fair bit: Kenos description of programming ATA/ATAPI.
The basic mechanism to enable interrupts is to clear nIEN in the DCR (Device Control Register):
nIEN: Drive Interrupt Enable bit. The enable bit for the drive interrupt to the host. When nIEN is 0 or the drive is selected the host interrupt signal INTRQ is enabled through a tri state buffer to the host. When nIEN is 1 or the drive is not selected the host interrupt signal INTRQ is in a high impedance state regardless of the presence or absence of a pending interrupt.
This www.ata-atapi.com is a good jumping-off point to find way more info about ATA/PATA/SATA/ATAPI than you want to know... Note that the official ATA-6/7/etc specs cost $$ from T13, though you can download current drafts of ATA-8 from them.
This link describes a few of the many ways ATA devices vary from the specs. (I used to write SCSI and ATA/ATAPI drivers for Commodore/Amiga, way back when, as well as help with qualifying drives - or more accurately, figuring out what idiocies drive makers had done.)
if this is just a hobby OS, why not use the BIOS interrupt (int 13h)? admittedly not as fast as direct disk access but safer for your hard drive (I've put a read head through a plate before messing with disk I/O).