Is there a 2 or 3-bit checksum algorithm - hash

Is there a 2 or 3 bit checksum algorithm that I can use to check my 6 bits of data for errors which I am reading in from an optical sensor that detects 8 bit patterns? I was not able to find anything.

You can xor the first three bits with the second ones and append the result, then xor them again to check it on the other side.

You could possibly use two 3b/4b codes to validate the result:
https://en.wikipedia.org/wiki/8b/10b_encoding

Not alot you can do with 0, 1, 2 or 3. Maybe get an integer value from your 6 bits and then do mod 4.

Related

Binary heap & minimum oriented priority queue's

could someone tell me which of these are binary heaps(max) and which of these are minimum oriented priority queue's, and why/why not that is? I'll post them in arrays since I don't know how to post pictures here, the x's mean that that position is blank.
Here we go: [8,6,7,4,6,6,x], [4,5,4,7,8,4,6],[,4,4,5,7,x,x,6]
I would assume that the first one is a binary heap, and the two others are minimum oriented priority queue´s, but according to the solutions I am wrong. The solutions might be wrong though, so please if you know which one is which please explain it to me.
Thanks in advance.
Well, the first could be a binary max heap. That is, the tree would look like this:
8
6 7
4 6 6
The second is a binary min heap:
4
5 4
7 8 4 6
The third can't be a binary heap, because it doesn't conform to the shape property. That is, it would correspond to:
4
4 5
7 x x 6
In a binary heap, the bottom row is left-filled. This tree is not left-filled.
So the first is a binary max heap. The second is a binary min heap, which can also be viewed as a min-oriented priority queue. I don't know what to call the third one. It's not a valid min-heap, and it's not a sequential representation of a minimum priority queue, because 7 comes before 6.
At least, that's my answer based on my understanding of binary heaps and priority queues.

Size of binary file after base64 encoding? Need explanation on the solution

So I'm studying for the upcoming exam, and there's this question: given a binary file with the size of 31 bytes what will its size be, after encoding it to base64?
The solution teacher gave us was (40 + 4) bytes as it needs to be a multiple of 4.
I'm not being able to come across this solution, and I have no idea how to solve this, so I was hoping somebody could help me figure this out.
Because base 64 encoding divide the input data in six bit block and one block use an ascii code.
If you have 31 byte in input you have 31*8/6 bit block to encode. As a rule of thumb every three byte in input you have 4 byte in output
If input data is not a multiple of six bit the base64 encoding fills the last block with 0 bit
In your example you have 42 block of six bit, with last filled with missing 0 bit.
Base 64 algorithm implementation filled the encoded data with '=' symbol in order to have of multiple of 4 as final result.

What is this table called and how do I read it?

I'm reading the powerpoint specification and I came across a table like this:
Do tables like these have a name? How do I read this?
I'm pretty sure it means that the first 4 bits identifies the recVer and the next 12 identifies the recInstance, but what about recLen? Do all 32 bits pull double-duty and identify the recLen or does that mean the next 32 bits do that?
It looks like some type of packet header. The numbers at the top are the bit position. It is read left to right, top to bottom, so it is telling you that the header is made up of 4 bits interpreted as the recVer, followed by 12 bits that is interpreted as recInstance, followed by 16 bits that is the recType, followed by 32 bits which is the recLen.
This is a common way to show the header structure, as can be seen on Wikipedia's TCP page.
This is just part of the binary format for the powerpoint file. the 0,1,2 etc are the bit numbers. So you can see bit's 0 - 3 inclusive are the recVer etc.
The specification will tell you want recVer, recInstance and recType mean.
I think recLen should be obvious but it'll be in the spec.
To read it, you'd read in the bytes and then do bit manipulation to decode those fields. You don't say what language you'll be using but you can do bit manipulation in a number of languages.
Not sure about an official/standard name, but this looks like a record layout map.
You read it left to right, every box is a single bit.
The record is composed of
4 bits recVer
12 bits recInstance
16 bits recType
32 bits recLen

How was the range of a 32 bit register defined?

I have a doubt..range of a 32 bit register is 2^32 ..is it because a bit can store 2 values if yes please could you justify it..it's really confusing..
Say you have 2 bit. The possible different binary values you could create., with 2 bit is 00, 01,10, and 11 hence 2^2 = 4. Hence, for decimal you could store 0,1,2,3 (4 vlaues) with 2 bits.
Similar case applies to 32 bits.

Why my filter output is not accurate?

I am simulating a digital filter, which is 4-stage.
Stages are:
CIC
half-band
OSR
128
Input is 4 bits and output is 24 bits. I am confused about the 24 bits output.
I use MATLAB to generate a 4 bits signed sinosoid input (using SD tool), and simulated with modelsim. So the output should be also a sinosoid. The issue is the output only contains 4 different data.
For 24 bits output, shouldn't we get a 2^24-1 different data?
What's the reason for this? Is it due to internal bit width?
I'm not familiar with Modelsim, and I don't understand the filter terminology you used, but...Are your filters linear systems? If so, an input at a given frequency will cause an output at the same frequency, though possibly different amplitude and phase. If your input signal is a single tone, sampled such that there are four values per cycle, the output will still have four values per cycle. Unless one of the stages performs sample rate conversion the system is behaving as expected. As as Donnie DeBoer pointed out, the word width of the calculation doesn't matter as long as it can represent the four values of the input.
Again, I am not familiar with the particulars of your system so if one of the stages does indeed perform sample rate conversion, this doesn't apply.
Forgive my lack of filter knowledge, but does one of the filter stages interpolate between the input values? If not, then you're only going to get a maximum of 2^4 output values (based on the input resolution), regardless of your output resolution. Just because you output to 24-bit doesn't mean you're going to have 2^24 values... imagine running a digital square wave into a D->A converter. You have all the output resolution in the world, but you still only have 2 values.
Its actually pretty simple:
Even though you have 4 bits of input, your filter coefficients may be more than 4 bits.
Every math stage you do adds bits. If you add two 4-bit values, the answer is a 5 bit number, so that adding 0xf and 0xf doesn't overflow. When you multiply two 4-bit values, you actually need 8 bits of output to hold the answer without the possibility of overflow. By the time all the math is done, your 4-bit input apparently needs 24-bits to hold the maximum possible output.